diff options
author | Sunny He <suhe@nvidia.com> | 2017-07-24 15:18:38 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-26 05:45:14 -0400 |
commit | d59271c7b79080388371877fc2d10574ca42206a (patch) | |
tree | 921f6d1ddce07235d7fbd1f27e6510b8cfe56ae7 /drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | |
parent | de3ad1a94974b08268a485136f04b8e436ef2579 (diff) |
gpu: nvgpu: Remove privsecurity flag from gpu_ops
Replace privsecurity boolean flag in gpu_ops with entry in
common flag system.
The new common flag is NVGPU_SEC_PRIVSECURITY
Jira NVGPU-74
Change-Id: I4b258f5ffbe30a6344ffba0ece51c6f5d47ebec1
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1525713
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Alex Waterman <alexw@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/pmu_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c index 0f99c67e..98cd3906 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <nvgpu/timers.h> | 16 | #include <nvgpu/timers.h> |
17 | #include <nvgpu/pmu.h> | 17 | #include <nvgpu/pmu.h> |
18 | #include <nvgpu/fuse.h> | 18 | #include <nvgpu/fuse.h> |
19 | #include <nvgpu/enabled.h> | ||
19 | 20 | ||
20 | #include "gk20a/gk20a.h" | 21 | #include "gk20a/gk20a.h" |
21 | #include "gk20a/pmu_gk20a.h" | 22 | #include "gk20a/pmu_gk20a.h" |
@@ -273,9 +274,11 @@ static void pmu_dump_security_fuses_gm20b(struct gk20a *g) | |||
273 | val); | 274 | val); |
274 | } | 275 | } |
275 | 276 | ||
276 | void gm20b_init_pmu_ops(struct gpu_ops *gops) | 277 | void gm20b_init_pmu_ops(struct gk20a *g) |
277 | { | 278 | { |
278 | if (gops->privsecurity) { | 279 | struct gpu_ops *gops = &g->ops; |
280 | |||
281 | if (nvgpu_is_enabled(g, NVGPU_SEC_PRIVSECURITY)) { | ||
279 | gm20b_init_secure_pmu(gops); | 282 | gm20b_init_secure_pmu(gops); |
280 | gops->pmu.init_wpr_region = gm20b_pmu_init_acr; | 283 | gops->pmu.init_wpr_region = gm20b_pmu_init_acr; |
281 | gops->pmu.load_lsfalcon_ucode = gm20b_load_falcon_ucode; | 284 | gops->pmu.load_lsfalcon_ucode = gm20b_load_falcon_ucode; |