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authorDeepak Goyal <dgoyal@nvidia.com>2017-12-06 15:33:08 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-12-08 08:13:33 -0500
commitd4c51a7321a506a73ad6c9c64b3a443ce98c1700 (patch)
tree4467fba16c2dde98a5f660b19defab74445460b1 /drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
parent7d65ec92d8eea59ccb02baf63848e21a76b6f304 (diff)
gpu: nvgpu: gv11b: Update elpg init seq for gv11b.
This updates register address/value pairs for ELPG init sequence in GV11B. Bug 200365505. Change-Id: I62517c378c39f5025f797cf849f10e6b0eae27a8 Signed-off-by: Deepak Goyal <dgoyal@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1612642 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/pmu_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/pmu_gm20b.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
index 664134f9..1c5fdce0 100644
--- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
@@ -37,15 +37,6 @@
37#include <nvgpu/hw/gm20b/hw_pwr_gm20b.h> 37#include <nvgpu/hw/gm20b/hw_pwr_gm20b.h>
38#include <nvgpu/hw/gm20b/hw_fuse_gm20b.h> 38#include <nvgpu/hw/gm20b/hw_fuse_gm20b.h>
39 39
40/*!
41 * Structure/object which single register write need to be done during PG init
42 * sequence to set PROD values.
43 */
44struct pg_init_sequence_list {
45 u32 regaddr;
46 u32 writeval;
47};
48
49#define gm20b_dbg_pmu(fmt, arg...) \ 40#define gm20b_dbg_pmu(fmt, arg...) \
50 gk20a_dbg(gpu_dbg_pmu, fmt, ##arg) 41 gk20a_dbg(gpu_dbg_pmu, fmt, ##arg)
51 42