diff options
author | Shardar Shariff Md <smohammed@nvidia.com> | 2016-09-08 16:49:44 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-09-13 02:09:16 -0400 |
commit | 7ff4a760a83aaff0c214a5564530a0f32de40a84 (patch) | |
tree | 4596917a987f66b1f1b7c3f12b219c5f60b517b3 /drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | |
parent | 24c38aed5913f0007f35f1ff507c099e70862097 (diff) |
gpu: nvgpu: change the usage of tegra_fuse_readl
tegra_fuse_readl() prototype is changed to match upstreamed
fuse driver, so change implementation accordingly.
Bug 200233653
Change-Id: I01f23cfafd5923d86ac48e67b36132ce690e962b
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1217374
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/pmu_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c index 30e8fa67..5c5a889a 100644 --- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c | |||
@@ -256,12 +256,15 @@ void gm20b_write_dmatrfbase(struct gk20a *g, u32 addr) | |||
256 | /*Dump Security related fuses*/ | 256 | /*Dump Security related fuses*/ |
257 | static void pmu_dump_security_fuses_gm20b(struct gk20a *g) | 257 | static void pmu_dump_security_fuses_gm20b(struct gk20a *g) |
258 | { | 258 | { |
259 | u32 val; | ||
260 | |||
259 | gk20a_err(dev_from_gk20a(g), "FUSE_OPT_SEC_DEBUG_EN_0 : 0x%x", | 261 | gk20a_err(dev_from_gk20a(g), "FUSE_OPT_SEC_DEBUG_EN_0 : 0x%x", |
260 | gk20a_readl(g, fuse_opt_sec_debug_en_r())); | 262 | gk20a_readl(g, fuse_opt_sec_debug_en_r())); |
261 | gk20a_err(dev_from_gk20a(g), "FUSE_OPT_PRIV_SEC_EN_0 : 0x%x", | 263 | gk20a_err(dev_from_gk20a(g), "FUSE_OPT_PRIV_SEC_EN_0 : 0x%x", |
262 | gk20a_readl(g, fuse_opt_priv_sec_en_r())); | 264 | gk20a_readl(g, fuse_opt_priv_sec_en_r())); |
265 | tegra_fuse_readl(FUSE_GCPLEX_CONFIG_FUSE_0, &val); | ||
263 | gk20a_err(dev_from_gk20a(g), "FUSE_GCPLEX_CONFIG_FUSE_0 : 0x%x", | 266 | gk20a_err(dev_from_gk20a(g), "FUSE_GCPLEX_CONFIG_FUSE_0 : 0x%x", |
264 | tegra_fuse_readl(FUSE_GCPLEX_CONFIG_FUSE_0)); | 267 | val); |
265 | } | 268 | } |
266 | 269 | ||
267 | void gm20b_init_pmu_ops(struct gpu_ops *gops) | 270 | void gm20b_init_pmu_ops(struct gpu_ops *gops) |