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authorAlex Waterman <alexw@nvidia.com>2017-08-11 16:35:24 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-14 14:18:31 -0400
commit36f02cf49729b32aa241cb9f1f235749da681dd1 (patch)
treeac2569ec2c828489a56aedcf9c85cadcbc0dee62 /drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
parent4412728b9606a2e2506961ed6e444a344af7ca29 (diff)
gpu: nvgpu: Add struct gk20a ptr to FUSE APIs
Add a pointer to struct gk20a to the FUSE APIs. This helps QNX builds avoid any static data definitions. Also this change plumbs struct gk20a in some of the Linux clk code and fixes a few minor style nits. Change-Id: I27dfb2c4e9a352f784d6cead150460d8e9e808d3 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1537611 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Richard Zhao <rizhao@nvidia.com> Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Sourab Gupta <sourabg@nvidia.com> Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/pmu_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/pmu_gm20b.c9
1 files changed, 4 insertions, 5 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
index 98cd3906..b85e72a0 100644
--- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
@@ -265,13 +265,12 @@ static void pmu_dump_security_fuses_gm20b(struct gk20a *g)
265{ 265{
266 u32 val; 266 u32 val;
267 267
268 nvgpu_err(g, "FUSE_OPT_SEC_DEBUG_EN_0 : 0x%x", 268 nvgpu_err(g, "FUSE_OPT_SEC_DEBUG_EN_0: 0x%x",
269 gk20a_readl(g, fuse_opt_sec_debug_en_r())); 269 gk20a_readl(g, fuse_opt_sec_debug_en_r()));
270 nvgpu_err(g, "FUSE_OPT_PRIV_SEC_EN_0 : 0x%x", 270 nvgpu_err(g, "FUSE_OPT_PRIV_SEC_EN_0: 0x%x",
271 gk20a_readl(g, fuse_opt_priv_sec_en_r())); 271 gk20a_readl(g, fuse_opt_priv_sec_en_r()));
272 nvgpu_tegra_fuse_read_gcplex_config_fuse(&val); 272 nvgpu_tegra_fuse_read_gcplex_config_fuse(g, &val);
273 nvgpu_err(g, "FUSE_GCPLEX_CONFIG_FUSE_0 : 0x%x", 273 nvgpu_err(g, "FUSE_GCPLEX_CONFIG_FUSE_0: 0x%x", val);
274 val);
275} 274}
276 275
277void gm20b_init_pmu_ops(struct gk20a *g) 276void gm20b_init_pmu_ops(struct gk20a *g)