gpu: nvgpu: Move fuse HAL to common

Move implementation of fuse HAL to common/fuse. Also implements new
fuse query functions for FBIO, FBP, TPC floorsweeping and security
fuses.

JIRA NVGPU-957

Change-Id: I55e256a4f1b59d50a721d4942907f70dc57467c4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1797177

1 files changed, 2 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
index 731078f7..53bec96f 100644
--- a/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/pmu_gm20b.c
@@ -36,7 +36,6 @@
 
 #include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
 #include <nvgpu/hw/gm20b/hw_pwr_gm20b.h>
-#include <nvgpu/hw/gm20b/hw_fuse_gm20b.h>
 
 #define gm20b_dbg_pmu(g, fmt, arg...) \
         nvgpu_log(g, gpu_dbg_pmu, fmt, ##arg)
@@ -267,9 +266,9 @@ void pmu_dump_security_fuses_gm20b(struct gk20a *g)
         u32 val;
 
         nvgpu_err(g, "FUSE_OPT_SEC_DEBUG_EN_0: 0x%x",
-                        gk20a_readl(g, fuse_opt_sec_debug_en_r()));
+                        g->ops.fuse.fuse_opt_sec_debug_en(g));
         nvgpu_err(g, "FUSE_OPT_PRIV_SEC_EN_0: 0x%x",
-                        gk20a_readl(g, fuse_opt_priv_sec_en_r()));
+                        g->ops.fuse.fuse_opt_priv_sec_en(g));
         nvgpu_tegra_fuse_read_gcplex_config_fuse(g, &val);
         nvgpu_err(g, "FUSE_GCPLEX_CONFIG_FUSE_0: 0x%x", val);
 }