nvgpu: gm20b: MISRA Rule 21.2 header gurad fixes

MISRA rule 21.2 doesn't allow the use of macro names which start with
an underscore. These leading underscores are to be removed from the
macro names. This patch will fix such violations caused by
include guards by renaming them to follow the convention,
'NVGPU_PARENT-DIR_HEADER_H'

JIRA NVGPU-1028

Change-Id: Ic60b2de8bb705f189134483fff1e2dff8ea96a12
Signed-off-by: smadhavan <smadhavan@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1808186
GVS: Gerrit_Virtual_Submit
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Adeel Raza <araza@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 3 insertions, 3 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.h b/drivers/gpu/nvgpu/gm20b/mm_gm20b.h
index 369fa1eb..be10be38 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.h
@@ -20,8 +20,8 @@
  * DEALINGS IN THE SOFTWARE.
  */
 
-#ifndef _NVHOST_GM20B_MM
-#define _NVHOST_GM20B_MM
+#ifndef NVGPU_GM20B_MM_GM20B_H
+#define NVGPU_GM20B_MM_GM20B_H
 struct gk20a;
 
 #define PDE_ADDR_START(x, y)    ((x) &  ~((0x1UL << (y)) - 1))
@@ -37,4 +37,4 @@ u64 gm20b_gpu_phys_addr(struct gk20a *g,
                         struct nvgpu_gmmu_attrs *attrs, u64 phys);
 u32 gm20b_get_kind_invalid(void);
 u32 gm20b_get_kind_pitch(void);
-#endif
+#endif /* NVGPU_GM20B_MM_GM20B_H */