gpu: nvgpu: Common VM initializer

Merge initialization code from gk20a_init_system_vm(),
gk20a_init_bar1_vm() and gk20a_vm_alloc_share() into gk20a_init_vm().

Remove redundant page size data, and move the page size fields to be
VM specific.

Bug 1558739
Bug 1560370

Change-Id: I4557d9e04d65ccb48fe1f2b116dd1bfa74cae98e
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 7 insertions, 13 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index 278ae9a6..b4622c0b 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -20,12 +20,6 @@
 #include "hw_fb_gm20b.h"
 #include "hw_gr_gm20b.h"
 
-static const u32 gmmu_page_sizes[gmmu_nr_page_sizes] = { SZ_4K, SZ_128K };
-static const u32 gmmu_page_shifts[gmmu_nr_page_sizes] = { 12, 17 };
-static const u64 gmmu_page_offset_masks[gmmu_nr_page_sizes] = { 0xfffLL,
-                                                                0x1ffffLL };
-static const u64 gmmu_page_masks[gmmu_nr_page_sizes] = { ~0xfffLL, ~0x1ffffLL };
-
 static int allocate_gmmu_ptes_sparse(struct vm_gk20a *vm,
                                 enum gmmu_pgsz_gk20a pgsz_idx,
                                 u64 first_vaddr, u64 last_vaddr,
@@ -97,9 +91,9 @@ static bool gm20b_vm_is_pde_in_range(struct vm_gk20a *vm, u64 vaddr_lo,
 
         gk20a_dbg_fn("");
 
-        pde_vaddr_lo = (u64)pde << vm->mm->pde_stride_shift;
+        pde_vaddr_lo = (u64)pde << vm->pde_stride_shift;
         pde_vaddr_hi = pde_vaddr_lo |
-                        ((0x1UL << (vm->mm->pde_stride_shift)) - 1);
+                        ((0x1UL << (vm->pde_stride_shift)) - 1);
 
         return ((vaddr_lo <= pde_vaddr_lo) && (vaddr_hi) >= pde_vaddr_hi);
 }
@@ -108,8 +102,8 @@ static int gm20b_vm_put_sparse(struct vm_gk20a *vm, u64 vaddr,
                                u32 num_pages, u32 pgsz_idx, bool refplus)
 {
         struct mm_gk20a *mm = vm->mm;
-        u32 pgsz = gmmu_page_sizes[pgsz_idx];
-        u32 pde_shift = vm->mm->pde_stride_shift;
+        u32 pgsz = vm->gmmu_page_sizes[pgsz_idx];
+        u32 pde_shift = vm->pde_stride_shift;
         u64 vaddr_hi;
         u64 vaddr_pde_start;
         u32 i;
@@ -127,7 +121,7 @@ static int gm20b_vm_put_sparse(struct vm_gk20a *vm, u64 vaddr,
         gk20a_dbg_info("vaddr: 0x%llx, vaddr_hi: 0x%llx, pde_lo: 0x%x, "
                         "pde_hi: 0x%x, pgsz: %d, pde_stride_shift: %d",
                         vaddr, vaddr_hi, pde_lo, pde_hi, pgsz,
-                        vm->mm->pde_stride_shift);
+                        vm->pde_stride_shift);
 
         for (i = pde_lo; i <= pde_hi; i++) {
                 /* Mark all ptes as sparse. */
@@ -240,7 +234,7 @@ void gm20b_vm_clear_sparse(struct vm_gk20a *vm, u64 vaddr,
         gk20a_dbg_info("vaddr: 0x%llx, vaddr_hi: 0x%llx, pde_lo: 0x%x, "
                         "pde_hi: 0x%x, pgsz_idx: %d, pde_stride_shift: %d",
                         vaddr, vaddr_hi, pde_lo, pde_hi, pgsz_idx,
-                        vm->mm->pde_stride_shift);
+                        vm->pde_stride_shift);
 
         for (pde_i = pde_lo; pde_i <= pde_hi; pde_i++) {
                 struct page_table_gk20a *pte = vm->pdes.ptes[pgsz_idx] + pde_i;
@@ -248,7 +242,7 @@ void gm20b_vm_clear_sparse(struct vm_gk20a *vm, u64 vaddr,
 
                 if (pte->ref_cnt == 0) {
                         free_gmmu_pages(vm, pte->ref, pte->sgt,
-                                vm->mm->page_table_sizing[pgsz_idx].order,
+                                vm->page_table_sizing[pgsz_idx].order,
                                 pte->size);
                         pte->ref = NULL;
                         update_gmmu_pde_locked(vm, pde_i);