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authorTerje Bergstrom <tbergstrom@nvidia.com>2018-04-18 22:39:46 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2018-05-09 21:26:04 -0400
commitdd739fcb039d51606e9a5454ec0aab17bcb01965 (patch)
tree806ba8575d146367ad1be00086ca0cdae35a6b28 /drivers/gpu/nvgpu/gm20b/mm_gm20b.c
parent7e66f2a63d4855e763fa768047dfc32f6f96b771 (diff)
gpu: nvgpu: Remove gk20a_dbg* functions
Switch all logging to nvgpu_log*(). gk20a_dbg* macros are intentionally left there because of use from other repositories. Because the new functions do not work without a pointer to struct gk20a, and piping it just for logging is excessive, some log messages are deleted. Change-Id: I00e22e75fe4596a330bb0282ab4774b3639ee31e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1704148 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/mm_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/mm_gm20b.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index 46cd1fc6..deca6686 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GM20B MMU 2 * GM20B MMU
3 * 3 *
4 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2018, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a 6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"), 7 * copy of this software and associated documentation files (the "Software"),
@@ -36,9 +36,9 @@ void gm20b_mm_set_big_page_size(struct gk20a *g,
36{ 36{
37 u32 val; 37 u32 val;
38 38
39 gk20a_dbg_fn(""); 39 nvgpu_log_fn(g, " ");
40 40
41 gk20a_dbg_info("big page size %d\n", size); 41 nvgpu_log_info(g, "big page size %d\n", size);
42 val = nvgpu_mem_rd32(g, mem, ram_in_big_page_size_w()); 42 val = nvgpu_mem_rd32(g, mem, ram_in_big_page_size_w());
43 val &= ~ram_in_big_page_size_m(); 43 val &= ~ram_in_big_page_size_m();
44 44
@@ -48,7 +48,7 @@ void gm20b_mm_set_big_page_size(struct gk20a *g,
48 val |= ram_in_big_page_size_128kb_f(); 48 val |= ram_in_big_page_size_128kb_f();
49 49
50 nvgpu_mem_wr32(g, mem, ram_in_big_page_size_w(), val); 50 nvgpu_mem_wr32(g, mem, ram_in_big_page_size_w(), val);
51 gk20a_dbg_fn("done"); 51 nvgpu_log_fn(g, "done");
52} 52}
53 53
54u32 gm20b_mm_get_big_page_sizes(void) 54u32 gm20b_mm_get_big_page_sizes(void)