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authorAlex Waterman <alexw@nvidia.com>2014-12-11 14:33:52 -0500
committerDan Willemsen <dwillemsen@nvidia.com>2015-04-04 21:02:38 -0400
commita99bbc5f6070a346006cf3f63e7f5f2120f30a2f (patch)
treed400d071aee0404aa1dca924b1e554c173d11735 /drivers/gpu/nvgpu/gm20b/mm_gm20b.c
parentedaf6188d54683bd955f1dc6673b3bb3ba18367e (diff)
gpu: nvgpu: make larger address space work
Implement several fixes for allowing the GVA address space to grow to larger than 32GB and increase the address space to 128GB. o Implement dynamic allocation of PDE backing pages. The memory to store the PDE entries was hard coded to 1 page. Now the number of pages necessary is computed dynamically based on the size of the address space and the size of large pages. o Fix an arithmetic problem in the gm20b sparse texture code that caused large address spaces to be truncated when sparse PDEs/PTEs were being filled in. This caused a kernel panic when freeing the address space since a lot of the backing PTE memory was not allocated. o Change the address space split for large and small pages. Small pages now occupy the bottom 16GB of the address space. Large pages are used for the rest of the address space. Now, with a 128GB address space, there are 112GB of large page GVA available. This patch exists to allow large (16GB) sparse textures to be allocated without running into lack of memory issues and kernel panics. Bug 1574267 Change-Id: I7c59ee54bd573dfc53b58c346156df37a85dfc22 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/671204 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/mm_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/mm_gm20b.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index 5b1a9a04..1adff5ab 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -111,7 +111,7 @@ static int gm20b_vm_put_sparse(struct vm_gk20a *vm, u64 vaddr,
111 111
112 gk20a_dbg_fn(""); 112 gk20a_dbg_fn("");
113 113
114 vaddr_hi = vaddr + pgsz * num_pages - 1; 114 vaddr_hi = vaddr + pgsz * (u64)num_pages - 1;
115 pde_range_from_vaddr_range(vm, 115 pde_range_from_vaddr_range(vm,
116 vaddr, 116 vaddr,
117 vaddr_hi, 117 vaddr_hi,