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authorAlex Waterman <alexw@nvidia.com>2016-12-19 18:23:01 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-01-18 19:46:38 -0500
commit8e53d790902b8a40098a5851584ae7ba58b357b6 (patch)
tree48fd2c6b26ac3137dd2dfe5255cc04f24bcc8834 /drivers/gpu/nvgpu/gm20b/mm_gm20b.c
parent6e2237ef622113b8fa1149aa48988a99fa30594f (diff)
gpu: nvgpu: Use timer API in gm20b code
Use the timer API instead of Linux specific APIs for handling timeouts. Also, lower the L2 timeout from 1 second (absurdly long) to 5ms. Bug 1799159 Change-Id: I27dbc35b12e9bc22ff2207bb87543f76203e20f1 Signed-off-by: Alex Waterman <alexw@nvidia.com> Reviewed-on: http://git-master/r/1273825 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/mm_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/mm_gm20b.c31
1 files changed, 14 insertions, 17 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
index ca8fbaee..8f5d1e10 100644
--- a/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/mm_gm20b.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * GM20B MMU 2 * GM20B MMU
3 * 3 *
4 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. 4 * Copyright (c) 2014-2017, NVIDIA CORPORATION. All rights reserved.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License, 7 * under the terms and conditions of the GNU General Public License,
@@ -20,6 +20,8 @@
20 20
21#include "mm_gm20b.h" 21#include "mm_gm20b.h"
22 22
23#include <nvgpu/timers.h>
24
23#include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h> 25#include <nvgpu/hw/gm20b/hw_gmmu_gm20b.h>
24#include <nvgpu/hw/gm20b/hw_fb_gm20b.h> 26#include <nvgpu/hw/gm20b/hw_fb_gm20b.h>
25#include <nvgpu/hw/gm20b/hw_gr_gm20b.h> 27#include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
@@ -27,28 +29,23 @@
27#include <nvgpu/hw/gm20b/hw_bus_gm20b.h> 29#include <nvgpu/hw/gm20b/hw_bus_gm20b.h>
28 30
29static int gm20b_mm_mmu_vpr_info_fetch_wait(struct gk20a *g, 31static int gm20b_mm_mmu_vpr_info_fetch_wait(struct gk20a *g,
30 const unsigned int msec) 32 unsigned int msec)
31{ 33{
32 unsigned long timeout; 34 struct nvgpu_timeout timeout;
33 35
34 if (tegra_platform_is_silicon()) 36 nvgpu_timeout_init(g, &timeout, msec, NVGPU_TIMER_CPU_TIMER);
35 timeout = jiffies + msecs_to_jiffies(msec);
36 else
37 timeout = msecs_to_jiffies(msec);
38 37
39 while (1) { 38 do {
40 u32 val; 39 u32 val;
40
41 val = gk20a_readl(g, fb_mmu_vpr_info_r()); 41 val = gk20a_readl(g, fb_mmu_vpr_info_r());
42 if (fb_mmu_vpr_info_fetch_v(val) == 42 if (fb_mmu_vpr_info_fetch_v(val) ==
43 fb_mmu_vpr_info_fetch_false_v()) 43 fb_mmu_vpr_info_fetch_false_v())
44 break; 44 return 0;
45 if (tegra_platform_is_silicon()) { 45
46 if (WARN_ON(time_after(jiffies, timeout))) 46 } while (!nvgpu_timeout_expired(&timeout));
47 return -ETIME; 47
48 } else if (--timeout == 0) 48 return -ETIMEDOUT;
49 return -ETIME;
50 }
51 return 0;
52} 49}
53 50
54int gm20b_mm_mmu_vpr_info_fetch(struct gk20a *g) 51int gm20b_mm_mmu_vpr_info_fetch(struct gk20a *g)