TEMP: gpu: nvgpu: gm20b: Mask LTC interrupts

LTC interrputs were set to random values at boot. For now, disable
all interrupts.

Change-Id: Ibb032cac91d3ea9a951fd8c2eb62a783af5bd1a1
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Reviewed-on: http://git-master/r/482639
Reviewed-by: Lauri Peltonen <lpeltonen@nvidia.com>
Tested-by: Lauri Peltonen <lpeltonen@nvidia.com>

1 files changed, 3 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
index f749279c..c265df02 100644
--- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c
@@ -186,6 +186,9 @@ static void gm20b_ltc_init_fs_state(struct gk20a *g)
         gk20a_writel(g, ltc_ltcs_ltss_dstg_cfg0_r(),
                      gk20a_readl(g, ltc_ltc0_lts0_dstg_cfg0_r()) |
                      ltc_ltcs_ltss_dstg_cfg0_vdc_4to2_disable_m());
+
+        /* Disable LTC interrupts */
+        gk20a_writel(g, ltc_ltcs_ltss_intr_r(), 0);
 }
 
 void gm20b_ltc_isr(struct gk20a *g)