diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2017-07-27 15:58:03 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-08-04 12:23:56 -0400 |
commit | b8efd9d04537d6129e2ce8b067417e46b0e7436f (patch) | |
tree | 1a40179a893e10c0fdcdd56797599bcdf6b55206 /drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | |
parent | c16797e35c2926bf34a61d5d8f37d5675ec23b1b (diff) |
gpu: nvgpu: Make LTC disabling common code
Refactor the sync_debugfs LTC HAL op so that the logic to enable
or disable LTC goes to common code nvgpu_ltc_sync_enabled() and
the LTC HAL set_enabled only performs the hardware register access.
Create a new common function nvgpu_init_ltc_support() to initialize
the LTC software variable, and move hardware initialization of LTC to
be called from it.
JIRA NVGPU-62
Change-Id: Ib1cf4f5b83ca3dac08407464ed56a732e0a33923
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1528262
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/ltc_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | 26 |
1 files changed, 9 insertions, 17 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c index 5e938141..6fef01ea 100644 --- a/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/ltc_gm20b.c | |||
@@ -437,25 +437,17 @@ void gm20b_ltc_init_cbc(struct gk20a *g, struct gr_gk20a *gr) | |||
437 | 437 | ||
438 | } | 438 | } |
439 | 439 | ||
440 | #ifdef CONFIG_DEBUG_FS | 440 | void gm20b_ltc_set_enabled(struct gk20a *g, bool enabled) |
441 | void gm20b_ltc_sync_debugfs(struct gk20a *g) | ||
442 | { | 441 | { |
443 | u32 reg_f = ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(); | 442 | u32 reg_f = ltc_ltcs_ltss_tstg_set_mgmt_2_l2_bypass_mode_enabled_f(); |
443 | u32 reg = gk20a_readl(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r()); | ||
444 | 444 | ||
445 | nvgpu_spinlock_acquire(&g->debugfs_lock); | 445 | if (enabled) |
446 | if (g->mm.ltc_enabled != g->mm.ltc_enabled_debug) { | 446 | /* bypass disabled (normal caching ops)*/ |
447 | u32 reg = gk20a_readl(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r()); | 447 | reg &= ~reg_f; |
448 | 448 | else | |
449 | if (g->mm.ltc_enabled_debug) | 449 | /* bypass enabled (no caching) */ |
450 | /* bypass disabled (normal caching ops)*/ | 450 | reg |= reg_f; |
451 | reg &= ~reg_f; | ||
452 | else | ||
453 | /* bypass enabled (no caching) */ | ||
454 | reg |= reg_f; | ||
455 | 451 | ||
456 | gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); | 452 | gk20a_writel(g, ltc_ltcs_ltss_tstg_set_mgmt_2_r(), reg); |
457 | g->mm.ltc_enabled = g->mm.ltc_enabled_debug; | ||
458 | } | ||
459 | nvgpu_spinlock_release(&g->debugfs_lock); | ||
460 | } | 453 | } |
461 | #endif | ||