diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-03-31 14:13:42 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-04-15 11:50:34 -0400 |
commit | 7d8e2193893454bc8e05543c956fab32b8eed54b (patch) | |
tree | afb73b81611136fd0411e17995532d6d22b0499f /drivers/gpu/nvgpu/gm20b/hw_pwr_gm20b.h | |
parent | 6839341bf8ffafa115cfc0427bba694ee1d131f3 (diff) |
gpu: nvgpu: Use sysmem aperture for SoC memory
In Tegra GPU, SoC memory has to be accessed as vidmem. In discrete GPU, it
has to be accessed as sysmem.
Change-Id: I4efe71b54a9a32f0bf1f02ec4016ed74405a14c5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1120468
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hw_pwr_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_pwr_gm20b.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hw_pwr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_pwr_gm20b.h index 7f1814f0..b4dae452 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_pwr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_pwr_gm20b.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | 2 | * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved. |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | 4 | * This program is free software; you can redistribute it and/or modify it |
5 | * under the terms and conditions of the GNU General Public License, | 5 | * under the terms and conditions of the GNU General Public License, |
@@ -538,6 +538,10 @@ static inline u32 pwr_pmu_new_instblk_target_sys_coh_f(void) | |||
538 | { | 538 | { |
539 | return 0x20000000; | 539 | return 0x20000000; |
540 | } | 540 | } |
541 | static inline u32 pwr_pmu_new_instblk_target_sys_ncoh_f(void) | ||
542 | { | ||
543 | return 0x30000000; | ||
544 | } | ||
541 | static inline u32 pwr_pmu_new_instblk_valid_f(u32 v) | 545 | static inline u32 pwr_pmu_new_instblk_valid_f(u32 v) |
542 | { | 546 | { |
543 | return (v & 0x1) << 30; | 547 | return (v & 0x1) << 30; |