diff options
author | Peter Daifuku <pdaifuku@nvidia.com> | 2016-04-15 21:12:34 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-05-19 18:58:24 -0400 |
commit | ce0fe5082ebb8a7e0ca5a8992e17ae4547d4db5e (patch) | |
tree | f7301c2993c78af2d69ad768e1aa6c35bede6cfc /drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h | |
parent | 5ccaaa73af4683eabd4d135b5b08aec4a206b613 (diff) |
gpu: nvgpu: hwpm broadcast register support
Add support for hwpm broadcast registers (ltc and lts)
In gr_gk20a_find_priv_offset_in_buffer, replace "Unknown address type" error
with informational message: gr_gk20a_exec_ctx_ops calls
gk20a_get_ctx_buffer_offsets and if that fails,
calls gr_gk20a_get_pm_ctx_buffer_offsets; HWPM registers will fail the first
call, so an error or warning is overkill.
Bug 1648200
Change-Id: I197b82579e9894652add4ff254418f818981415a
Signed-off-by: Peter Daifuku <pdaifuku@nvidia.com>
Reviewed-on: http://git-master/r/1131365
(cherry picked from commit 9f30a92c5d87f6dadd34cc37396a6b10e3a72751)
Reviewed-on: http://git-master/r/1133628
(cherry picked from commit 7eb7cfd998852ba7f7c4c40d3db286f66e83ab3a)
Reviewed-on: http://git-master/r/1127749
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h index aa01e945..8c00520c 100644 --- a/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/hw_ltc_gm20b.h | |||
@@ -50,6 +50,26 @@ | |||
50 | #ifndef _hw_ltc_gm20b_h_ | 50 | #ifndef _hw_ltc_gm20b_h_ |
51 | #define _hw_ltc_gm20b_h_ | 51 | #define _hw_ltc_gm20b_h_ |
52 | 52 | ||
53 | static inline u32 ltc_pltcg_base_v(void) | ||
54 | { | ||
55 | return 0x00140000; | ||
56 | } | ||
57 | static inline u32 ltc_pltcg_extent_v(void) | ||
58 | { | ||
59 | return 0x0017ffff; | ||
60 | } | ||
61 | static inline u32 ltc_ltc0_ltss_v(void) | ||
62 | { | ||
63 | return 0x00140200; | ||
64 | } | ||
65 | static inline u32 ltc_ltc0_lts0_v(void) | ||
66 | { | ||
67 | return 0x00140400; | ||
68 | } | ||
69 | static inline u32 ltc_ltcs_ltss_v(void) | ||
70 | { | ||
71 | return 0x0017e200; | ||
72 | } | ||
53 | static inline u32 ltc_ltcs_lts0_cbc_ctrl1_r(void) | 73 | static inline u32 ltc_ltcs_lts0_cbc_ctrl1_r(void) |
54 | { | 74 | { |
55 | return 0x0014046c; | 75 | return 0x0014046c; |