gpu: nvgpu: Control comptagline assignment from kernel

On Maxwell comptaglines are assigned per 128k, but preferred big page
size for graphics is 64k. Bit 16 of GPU VA is used for determining
which half of comptagline is used.

This creates problems if user space wants to map a page multiple times
and to arbitrary GPU VA. In one mapping the page might be mapped to
lower half of 128k comptagline, and in another mapping the page might
be mapped to upper half.

Turn on mode where MSB of comptagline in PTE is used instead of bit 16
for determining the comptagline lower/upper half selection.

Bug 1704834

Change-Id: If87e8f6ac0fc9c5624e80fa1ba2ceeb02781355b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/924322
Reviewed-by: Alex Waterman <alexw@nvidia.com>

1 files changed, 8 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h
index 5ec4a46e..d68f6479 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h
@@ -94,6 +94,14 @@ static inline u32 fb_mmu_ctrl_use_pdb_big_page_size_false_f(void)
 {
         return 0x0;
 }
+static inline u32 fb_mmu_ctrl_use_full_comp_tag_line_v(u32 r)
+{
+        return (r >> 12) & 0x1;
+}
+static inline u32 fb_mmu_ctrl_use_full_comp_tag_line_true_f(void)
+{
+        return 0x1000;
+}
 static inline u32 fb_priv_mmu_phy_secure_r(void)
 {
         return 0x00100ce4;