gpu: nvgpu: support for dumping vpr/wpr info

Added support for dumping vpr/wpr info for gm20b.
This dump info called when ever gk20a_mm_fb_flush
is timed-out.

Bug 200082817

Change-Id: I21b0372d0e3f976a189c9c428c015165b715bf88
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-on: http://git-master/r/711439
(cherry picked from commit b69897d71c8f6119b49ceb8d3273cdb354178cc5)
Reviewed-on: http://git-master/r/712675
GVS: Gerrit_Virtual_Submit
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>

1 files changed, 61 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h
index 91b998ca..a753074e 100644
--- a/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/hw_fb_gm20b.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -222,6 +222,34 @@ static inline u32 fb_mmu_vpr_info_r(void)
 {
         return 0x00100cd0;
 }
+static inline u32 fb_mmu_vpr_info_index_f(u32 v)
+{
+        return (v & 0x3) << 0;
+}
+static inline u32 fb_mmu_vpr_info_index_v(u32 r)
+{
+        return (r >> 0) & 0x3;
+}
+static inline u32 fb_mmu_vpr_info_index_addr_lo_v(void)
+{
+        return 0x00000000;
+}
+static inline u32 fb_mmu_vpr_info_index_addr_hi_v(void)
+{
+        return 0x00000001;
+}
+static inline u32 fb_mmu_vpr_info_index_cya_lo_v(void)
+{
+        return 0x00000002;
+}
+static inline u32 fb_mmu_vpr_info_index_cya_hi_v(void)
+{
+        return 0x00000003;
+}
+static inline u32 fb_mmu_vpr_info_fetch_f(u32 v)
+{
+        return (v & 0x1) << 2;
+}
 static inline u32 fb_mmu_vpr_info_fetch_v(u32 r)
 {
         return (r >> 2) & 0x1;
@@ -234,4 +262,36 @@ static inline u32 fb_mmu_vpr_info_fetch_true_v(void)
 {
         return 0x00000001;
 }
+static inline u32 fb_mmu_wpr_info_r(void)
+{
+        return 0x00100cd4;
+}
+static inline u32 fb_mmu_wpr_info_index_f(u32 v)
+{
+        return (v & 0xf) << 0;
+}
+static inline u32 fb_mmu_wpr_info_index_allow_read_v(void)
+{
+        return 0x00000000;
+}
+static inline u32 fb_mmu_wpr_info_index_allow_write_v(void)
+{
+        return 0x00000001;
+}
+static inline u32 fb_mmu_wpr_info_index_wpr1_addr_lo_v(void)
+{
+        return 0x00000002;
+}
+static inline u32 fb_mmu_wpr_info_index_wpr1_addr_hi_v(void)
+{
+        return 0x00000003;
+}
+static inline u32 fb_mmu_wpr_info_index_wpr2_addr_lo_v(void)
+{
+        return 0x00000004;
+}
+static inline u32 fb_mmu_wpr_info_index_wpr2_addr_hi_v(void)
+{
+        return 0x00000005;
+}
 #endif