diff options
author | Bo Yan <byan@nvidia.com> | 2014-04-14 15:03:27 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:09:38 -0400 |
commit | 9eb1f57ba2b7072c6c53ca9dc59b10a87d88db23 (patch) | |
tree | de095fcbae617e938064e45a96b4e176015fe773 /drivers/gpu/nvgpu/gm20b/hw_chiplet_pwr_gm20b.h | |
parent | 2531751f53fc21bdeb0ece4af550ea1e8efb9653 (diff) |
gpu: nvgpu: Add GPU driver for GM20B
this moves GM20B driver to the new location
Change-Id: I5fde14e114a8db79738a4c61849912b1ae225fb5
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hw_chiplet_pwr_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hw_chiplet_pwr_gm20b.h | 85 |
1 files changed, 85 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hw_chiplet_pwr_gm20b.h b/drivers/gpu/nvgpu/gm20b/hw_chiplet_pwr_gm20b.h new file mode 100644 index 00000000..a9e28cb5 --- /dev/null +++ b/drivers/gpu/nvgpu/gm20b/hw_chiplet_pwr_gm20b.h | |||
@@ -0,0 +1,85 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it | ||
5 | * under the terms and conditions of the GNU General Public License, | ||
6 | * version 2, as published by the Free Software Foundation. | ||
7 | * | ||
8 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
11 | * more details. | ||
12 | * | ||
13 | * You should have received a copy of the GNU General Public License | ||
14 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | ||
15 | */ | ||
16 | /* | ||
17 | * Function naming determines intended use: | ||
18 | * | ||
19 | * <x>_r(void) : Returns the offset for register <x>. | ||
20 | * | ||
21 | * <x>_o(void) : Returns the offset for element <x>. | ||
22 | * | ||
23 | * <x>_w(void) : Returns the word offset for word (4 byte) element <x>. | ||
24 | * | ||
25 | * <x>_<y>_s(void) : Returns size of field <y> of register <x> in bits. | ||
26 | * | ||
27 | * <x>_<y>_f(u32 v) : Returns a value based on 'v' which has been shifted | ||
28 | * and masked to place it at field <y> of register <x>. This value | ||
29 | * can be |'d with others to produce a full register value for | ||
30 | * register <x>. | ||
31 | * | ||
32 | * <x>_<y>_m(void) : Returns a mask for field <y> of register <x>. This | ||
33 | * value can be ~'d and then &'d to clear the value of field <y> for | ||
34 | * register <x>. | ||
35 | * | ||
36 | * <x>_<y>_<z>_f(void) : Returns the constant value <z> after being shifted | ||
37 | * to place it at field <y> of register <x>. This value can be |'d | ||
38 | * with others to produce a full register value for <x>. | ||
39 | * | ||
40 | * <x>_<y>_v(u32 r) : Returns the value of field <y> from a full register | ||
41 | * <x> value 'r' after being shifted to place its LSB at bit 0. | ||
42 | * This value is suitable for direct comparison with other unshifted | ||
43 | * values appropriate for use in field <y> of register <x>. | ||
44 | * | ||
45 | * <x>_<y>_<z>_v(void) : Returns the constant value for <z> defined for | ||
46 | * field <y> of register <x>. This value is suitable for direct | ||
47 | * comparison with unshifted values appropriate for use in field <y> | ||
48 | * of register <x>. | ||
49 | */ | ||
50 | #ifndef _hw_chiplet_pwr_gm20b_h_ | ||
51 | #define _hw_chiplet_pwr_gm20b_h_ | ||
52 | |||
53 | static inline u32 chiplet_pwr_gpcs_weight_6_r(void) | ||
54 | { | ||
55 | return 0x0010e018; | ||
56 | } | ||
57 | static inline u32 chiplet_pwr_gpcs_weight_7_r(void) | ||
58 | { | ||
59 | return 0x0010e01c; | ||
60 | } | ||
61 | static inline u32 chiplet_pwr_gpcs_config_1_r(void) | ||
62 | { | ||
63 | return 0x0010e03c; | ||
64 | } | ||
65 | static inline u32 chiplet_pwr_gpcs_config_1_ba_enable_yes_f(void) | ||
66 | { | ||
67 | return 0x1; | ||
68 | } | ||
69 | static inline u32 chiplet_pwr_fbps_weight_0_r(void) | ||
70 | { | ||
71 | return 0x0010e100; | ||
72 | } | ||
73 | static inline u32 chiplet_pwr_fbps_weight_1_r(void) | ||
74 | { | ||
75 | return 0x0010e104; | ||
76 | } | ||
77 | static inline u32 chiplet_pwr_fbps_config_1_r(void) | ||
78 | { | ||
79 | return 0x0010e13c; | ||
80 | } | ||
81 | static inline u32 chiplet_pwr_fbps_config_1_ba_enable_yes_f(void) | ||
82 | { | ||
83 | return 0x1; | ||
84 | } | ||
85 | #endif | ||