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authorSunny He <suhe@nvidia.com>2017-07-28 21:36:52 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-08-02 17:43:25 -0400
commita15e110a9b790f55a5c6e257cfbf7f7235f5a334 (patch)
tree199209146e3e67927c13e2ece240de40f973e1ea /drivers/gpu/nvgpu/gm20b/hal_gm20b.c
parent43ae97000be786e4118d431637f05b1462e296c4 (diff)
gpu: nvgpu: Reorg regops HAL initialization
Reorganize HAL initialization to remove inheritance and construct the gpu_ops struct at compile time. This patch only covers the regops sub-module of the gpu_ops struct. Perform HAL function assignments in hal_gxxxx.c through the population of a chip-specific copy of gpu_ops. Jira NVGPU-74 Change-Id: I7e2ccf158a8e7efa453a3326e86146660f18926f Signed-off-by: Sunny He <suhe@nvidia.com> Reviewed-on: https://git-master.nvidia.com/r/1530135 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Alex Waterman <alexw@nvidia.com> Tested-by: Alex Waterman <alexw@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hal_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index 407a442a..c2bccbee 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -277,6 +277,29 @@ static const struct gpu_ops gm20b_ops = {
277 .init_therm_setup_hw = gm20b_init_therm_setup_hw, 277 .init_therm_setup_hw = gm20b_init_therm_setup_hw,
278 .elcg_init_idle_filters = gk20a_elcg_init_idle_filters, 278 .elcg_init_idle_filters = gk20a_elcg_init_idle_filters,
279 }, 279 },
280 .regops = {
281 .get_global_whitelist_ranges =
282 gm20b_get_global_whitelist_ranges,
283 .get_global_whitelist_ranges_count =
284 gm20b_get_global_whitelist_ranges_count,
285 .get_context_whitelist_ranges =
286 gm20b_get_context_whitelist_ranges,
287 .get_context_whitelist_ranges_count =
288 gm20b_get_context_whitelist_ranges_count,
289 .get_runcontrol_whitelist = gm20b_get_runcontrol_whitelist,
290 .get_runcontrol_whitelist_count =
291 gm20b_get_runcontrol_whitelist_count,
292 .get_runcontrol_whitelist_ranges =
293 gm20b_get_runcontrol_whitelist_ranges,
294 .get_runcontrol_whitelist_ranges_count =
295 gm20b_get_runcontrol_whitelist_ranges_count,
296 .get_qctl_whitelist = gm20b_get_qctl_whitelist,
297 .get_qctl_whitelist_count = gm20b_get_qctl_whitelist_count,
298 .get_qctl_whitelist_ranges = gm20b_get_qctl_whitelist_ranges,
299 .get_qctl_whitelist_ranges_count =
300 gm20b_get_qctl_whitelist_ranges_count,
301 .apply_smpc_war = gm20b_apply_smpc_war,
302 },
280 .mc = { 303 .mc = {
281 .intr_enable = mc_gk20a_intr_enable, 304 .intr_enable = mc_gk20a_intr_enable,
282 .intr_unit_config = mc_gk20a_intr_unit_config, 305 .intr_unit_config = mc_gk20a_intr_unit_config,
@@ -350,6 +373,7 @@ int gm20b_init_hal(struct gk20a *g)
350 gops->fifo = gm20b_ops.fifo; 373 gops->fifo = gm20b_ops.fifo;
351 gops->gr_ctx = gm20b_ops.gr_ctx; 374 gops->gr_ctx = gm20b_ops.gr_ctx;
352 gops->therm = gm20b_ops.therm; 375 gops->therm = gm20b_ops.therm;
376 gops->regops = gm20b_ops.regops;
353 gops->mc = gm20b_ops.mc; 377 gops->mc = gm20b_ops.mc;
354 gops->dbg_session_ops = gm20b_ops.dbg_session_ops; 378 gops->dbg_session_ops = gm20b_ops.dbg_session_ops;
355 gops->debug = gm20b_ops.debug; 379 gops->debug = gm20b_ops.debug;
@@ -404,7 +428,6 @@ int gm20b_init_hal(struct gk20a *g)
404 gm20b_init_mm(gops); 428 gm20b_init_mm(gops);
405 gm20b_init_pmu_ops(g); 429 gm20b_init_pmu_ops(g);
406 gm20b_init_clk_ops(gops); 430 gm20b_init_clk_ops(gops);
407 gm20b_init_regops(gops);
408 431
409 g->name = "gm20b"; 432 g->name = "gm20b";
410 433