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authorShardar Shariff Md <smohammed@nvidia.com>2016-09-08 16:49:44 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2016-09-13 02:09:16 -0400
commit7ff4a760a83aaff0c214a5564530a0f32de40a84 (patch)
tree4596917a987f66b1f1b7c3f12b219c5f60b517b3 /drivers/gpu/nvgpu/gm20b/hal_gm20b.c
parent24c38aed5913f0007f35f1ff507c099e70862097 (diff)
gpu: nvgpu: change the usage of tegra_fuse_readl
tegra_fuse_readl() prototype is changed to match upstreamed fuse driver, so change implementation accordingly. Bug 200233653 Change-Id: I01f23cfafd5923d86ac48e67b36132ce690e962b Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Reviewed-on: http://git-master/r/1217374 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hal_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/hal_gm20b.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
index e30ca96f..5133fb35 100644
--- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c
@@ -180,6 +180,7 @@ int gm20b_init_hal(struct gk20a *g)
180 struct gpu_ops *gops = &g->ops; 180 struct gpu_ops *gops = &g->ops;
181 struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics; 181 struct nvgpu_gpu_characteristics *c = &g->gpu_characteristics;
182 struct gk20a_platform *platform = dev_get_drvdata(g->dev); 182 struct gk20a_platform *platform = dev_get_drvdata(g->dev);
183 u32 val;
183 184
184 *gops = gm20b_ops; 185 *gops = gm20b_ops;
185 gops->securegpccs = false; 186 gops->securegpccs = false;
@@ -187,8 +188,8 @@ int gm20b_init_hal(struct gk20a *g)
187 if (platform->is_fmodel) { 188 if (platform->is_fmodel) {
188 gops->privsecurity = 1; 189 gops->privsecurity = 1;
189 } else { 190 } else {
190 if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0) & 191 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0, &val);
191 PRIV_SECURITY_DISABLE) { 192 if (val & PRIV_SECURITY_DISABLE) {
192 gk20a_dbg_info("priv security is disabled in HW"); 193 gk20a_dbg_info("priv security is disabled in HW");
193 gops->privsecurity = 0; 194 gops->privsecurity = 0;
194 } else { 195 } else {
@@ -200,8 +201,8 @@ int gm20b_init_hal(struct gk20a *g)
200 gk20a_dbg_info("running ASIM with PRIV security disabled"); 201 gk20a_dbg_info("running ASIM with PRIV security disabled");
201 gops->privsecurity = 0; 202 gops->privsecurity = 0;
202 } else { 203 } else {
203 if (tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0) & 204 tegra_fuse_readl(FUSE_OPT_PRIV_SEC_DIS_0, &val);
204 PRIV_SECURITY_DISABLE) { 205 if (val & PRIV_SECURITY_DISABLE) {
205 gops->privsecurity = 0; 206 gops->privsecurity = 0;
206 } else { 207 } else {
207 gk20a_dbg_info("priv security is not supported but enabled"); 208 gk20a_dbg_info("priv security is not supported but enabled");