diff options
author | Sunny He <suhe@nvidia.com> | 2017-07-26 13:47:16 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-07-27 19:34:43 -0400 |
commit | 6431ec360bf7b7baf6dd687b1525c40114ede189 (patch) | |
tree | f899b3e215bf87cc411cefaf54c9b6011e487eb4 /drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |
parent | 9907b97985c47003a179c4357274b737cc0699ee (diff) |
gpu: nvgpu: Reorg gr_ctx HAL initialization
Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the
gr_ctx sub-module of the gpu_ops struct.
Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.
Jira NVGPU-74
Change-Id: I783d8e8919d8694ad2aa0d285e4c5a2b62580f48
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1527417
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/hal_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/hal_gm20b.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c index c89f3746..1a11b11c 100644 --- a/drivers/gpu/nvgpu/gm20b/hal_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/hal_gm20b.c | |||
@@ -268,6 +268,10 @@ static const struct gpu_ops gm20b_ops = { | |||
268 | .get_syncpt_incr_cmd_size = gk20a_fifo_get_syncpt_incr_cmd_size, | 268 | .get_syncpt_incr_cmd_size = gk20a_fifo_get_syncpt_incr_cmd_size, |
269 | #endif | 269 | #endif |
270 | }, | 270 | }, |
271 | .gr_ctx = { | ||
272 | .get_netlist_name = gr_gm20b_get_netlist_name, | ||
273 | .is_fw_defined = gr_gm20b_is_firmware_defined, | ||
274 | }, | ||
271 | .mc = { | 275 | .mc = { |
272 | .intr_enable = mc_gk20a_intr_enable, | 276 | .intr_enable = mc_gk20a_intr_enable, |
273 | .intr_unit_config = mc_gk20a_intr_unit_config, | 277 | .intr_unit_config = mc_gk20a_intr_unit_config, |
@@ -339,6 +343,7 @@ int gm20b_init_hal(struct gk20a *g) | |||
339 | gops->ce2 = gm20b_ops.ce2; | 343 | gops->ce2 = gm20b_ops.ce2; |
340 | gops->clock_gating = gm20b_ops.clock_gating; | 344 | gops->clock_gating = gm20b_ops.clock_gating; |
341 | gops->fifo = gm20b_ops.fifo; | 345 | gops->fifo = gm20b_ops.fifo; |
346 | gops->gr_ctx = gm20b_ops.gr_ctx; | ||
342 | gops->mc = gm20b_ops.mc; | 347 | gops->mc = gm20b_ops.mc; |
343 | gops->dbg_session_ops = gm20b_ops.dbg_session_ops; | 348 | gops->dbg_session_ops = gm20b_ops.dbg_session_ops; |
344 | gops->debug = gm20b_ops.debug; | 349 | gops->debug = gm20b_ops.debug; |
@@ -356,6 +361,7 @@ int gm20b_init_hal(struct gk20a *g) | |||
356 | gm20b_ops.chip_init_gpu_characteristics; | 361 | gm20b_ops.chip_init_gpu_characteristics; |
357 | gops->get_litter_value = gm20b_ops.get_litter_value; | 362 | gops->get_litter_value = gm20b_ops.get_litter_value; |
358 | 363 | ||
364 | __nvgpu_set_enabled(g, NVGPU_GR_USE_DMA_FOR_FW_BOOTSTRAP, true); | ||
359 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); | 365 | __nvgpu_set_enabled(g, NVGPU_SEC_SECUREGPCCS, false); |
360 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); | 366 | __nvgpu_set_enabled(g, NVGPU_PMU_PSTATE, false); |
361 | 367 | ||
@@ -389,7 +395,6 @@ int gm20b_init_hal(struct gk20a *g) | |||
389 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; | 395 | g->bootstrap_owner = LSF_BOOTSTRAP_OWNER_DEFAULT; |
390 | gm20b_init_gr(g); | 396 | gm20b_init_gr(g); |
391 | gm20b_init_fb(gops); | 397 | gm20b_init_fb(gops); |
392 | gm20b_init_gr_ctx(gops); | ||
393 | gm20b_init_mm(gops); | 398 | gm20b_init_mm(gops); |
394 | gm20b_init_pmu_ops(g); | 399 | gm20b_init_pmu_ops(g); |
395 | gm20b_init_clk_ops(gops); | 400 | gm20b_init_clk_ops(gops); |