diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-10-27 05:06:59 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:11:54 -0400 |
commit | 2d5ff668cbc6a932df2c9cf79627d1d340e5c2c0 (patch) | |
tree | 1d9bc4b774a9c2cea339891eaef3af5b87ee354d /drivers/gpu/nvgpu/gm20b/gr_ops_gm20b.h | |
parent | 23a182aaa61d120c965f1bce09609cc14d4e14eb (diff) |
gpu: nvgpu: GR and LTC HAL to use const structs
Convert GR and LTC HALs to use const structs, and initialize them
with macros.
Bug 1567274
Change-Id: Ia3f24a5eccb27578d9cba69755f636818d11275c
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/590371
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_ops_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_ops_gm20b.h | 79 |
1 files changed, 79 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_ops_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_ops_gm20b.h new file mode 100644 index 00000000..9477da75 --- /dev/null +++ b/drivers/gpu/nvgpu/gm20b/gr_ops_gm20b.h | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * GM20B GPU graphics ops | ||
3 | * | ||
4 | * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | */ | ||
15 | |||
16 | #ifndef _GR_OPS_GM20B_H_ | ||
17 | #define _GR_OPS_GM20B_H_ | ||
18 | |||
19 | #include "gr_ops.h" | ||
20 | |||
21 | #define __gr_gm20b_op(X) gr_gm20b_ ## X | ||
22 | #define __set_gr_gm20b_op(X) . X = gr_gm20b_ ## X | ||
23 | |||
24 | void __gr_gm20b_op(init_gpc_mmu)(struct gk20a *); | ||
25 | void __gr_gm20b_op(bundle_cb_defaults)(struct gk20a *); | ||
26 | void __gr_gm20b_op(cb_size_default)(struct gk20a *); | ||
27 | int __gr_gm20b_op(calc_global_ctx_buffer_size)(struct gk20a *); | ||
28 | void __gr_gm20b_op(commit_global_bundle_cb)(struct gk20a *, | ||
29 | struct channel_ctx_gk20a *, u64, u64, bool); | ||
30 | int __gr_gm20b_op(commit_global_cb_manager)(struct gk20a *, | ||
31 | struct channel_gk20a *, bool); | ||
32 | void __gr_gm20b_op(commit_global_pagepool)(struct gk20a *, | ||
33 | struct channel_ctx_gk20a *, u64 , u32, bool); | ||
34 | int __gr_gm20b_op(handle_sw_method)(struct gk20a *, u32 , u32, u32, u32); | ||
35 | void __gr_gm20b_op(set_alpha_circular_buffer_size)(struct gk20a *, u32); | ||
36 | void __gr_gm20b_op(set_circular_buffer_size)(struct gk20a *, u32); | ||
37 | void __gr_gm20b_op(enable_hww_exceptions)(struct gk20a *); | ||
38 | bool __gr_gm20b_op(is_valid_class)(struct gk20a *, u32); | ||
39 | void __gr_gm20b_op(get_sm_dsm_perf_regs)(struct gk20a *, u32 *, u32 **, u32 *); | ||
40 | void __gr_gm20b_op(get_sm_dsm_perf_ctrl_regs)(struct gk20a *, | ||
41 | u32 *, u32 **, u32 *); | ||
42 | int __gr_gm20b_op(init_fs_state)(struct gk20a *); | ||
43 | void __gr_gm20b_op(set_hww_esr_report_mask)(struct gk20a *); | ||
44 | int __gr_gm20b_op(falcon_load_ucode)(struct gk20a *, | ||
45 | u64, struct gk20a_ctxsw_ucode_segments *, u32); | ||
46 | u32 __gr_gm20b_op(get_gpc_tpc_mask)(struct gk20a *, u32); | ||
47 | int __gr_gm20b_op(load_ctxsw_ucode)(struct gk20a *); | ||
48 | |||
49 | #define __set_gr_gm20b_ops() \ | ||
50 | /* newly defined for gm20b */ \ | ||
51 | __set_gr_gm20b_op(init_gpc_mmu), \ | ||
52 | __set_gr_gm20b_op(bundle_cb_defaults), \ | ||
53 | __set_gr_gm20b_op(cb_size_default), \ | ||
54 | __set_gr_gm20b_op(calc_global_ctx_buffer_size), \ | ||
55 | __set_gr_gm20b_op(commit_global_bundle_cb), \ | ||
56 | __set_gr_gm20b_op(commit_global_cb_manager), \ | ||
57 | __set_gr_gm20b_op(commit_global_pagepool), \ | ||
58 | __set_gr_gm20b_op(handle_sw_method), \ | ||
59 | __set_gr_gm20b_op(set_alpha_circular_buffer_size), \ | ||
60 | __set_gr_gm20b_op(set_circular_buffer_size), \ | ||
61 | __set_gr_gm20b_op(enable_hww_exceptions), \ | ||
62 | __set_gr_gm20b_op(is_valid_class), \ | ||
63 | __set_gr_gm20b_op(get_sm_dsm_perf_regs), \ | ||
64 | __set_gr_gm20b_op(get_sm_dsm_perf_ctrl_regs), \ | ||
65 | __set_gr_gm20b_op(init_fs_state), \ | ||
66 | __set_gr_gm20b_op(set_hww_esr_report_mask), \ | ||
67 | __set_gr_gm20b_op(falcon_load_ucode), \ | ||
68 | __set_gr_gm20b_op(get_gpc_tpc_mask), \ | ||
69 | \ | ||
70 | /* reused from gk20a */ \ | ||
71 | __set_gr_gk20a_op(access_smpc_reg), \ | ||
72 | __set_gr_gk20a_op(commit_global_attrib_cb), \ | ||
73 | __set_gr_gk20a_op(free_channel_ctx), \ | ||
74 | __set_gr_gk20a_op(alloc_obj_ctx), \ | ||
75 | __set_gr_gk20a_op(free_obj_ctx), \ | ||
76 | __set_gr_gk20a_op(bind_ctxsw_zcull), \ | ||
77 | __set_gr_gk20a_op(get_zcull_info) | ||
78 | |||
79 | #endif | ||