diff options
author | Shardar Shariff Md <smohammed@nvidia.com> | 2016-11-01 09:36:06 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-11-11 05:18:40 -0500 |
commit | cc4208a27831faf95409b491aa29b8a161bf630a (patch) | |
tree | 57200cca04b4d477bed934577c16b7ccdf93ae83 /drivers/gpu/nvgpu/gm20b/gr_gm20b.h | |
parent | 5855fe26cb401d6d139b930ab48bb1106301585f (diff) |
gpu: nvgpu: define fuse macro depend on kernel version
- Define fuse macros depending on kernel version as fuse
offset got changed in K4.4 and for K4.4 fuse defines are
defined in common header file (tegra-fuse.h)
- Use fuse control read/write APIs when reading control
registers for K4.4.
Bug 200243956
Change-Id: I5a86ef58d9de17a273aea8d3ce8ad5772444dac2
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1245824
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h index fc52f223..fd24d105 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.h | |||
@@ -15,6 +15,9 @@ | |||
15 | 15 | ||
16 | #ifndef _NVHOST_GM20B_GR_MMU_H | 16 | #ifndef _NVHOST_GM20B_GR_MMU_H |
17 | #define _NVHOST_GM20B_GR_MMU_H | 17 | #define _NVHOST_GM20B_GR_MMU_H |
18 | |||
19 | #include <linux/version.h> | ||
20 | |||
18 | struct gk20a; | 21 | struct gk20a; |
19 | 22 | ||
20 | enum { | 23 | enum { |
@@ -31,10 +34,12 @@ enum { | |||
31 | #define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 0x48 | 34 | #define CLK_RST_CONTROLLER_MISC_CLK_ENB_0 0x48 |
32 | #define CLK_RST_CONTROLLER_MISC_CLK_ENB_0_ALL_VISIBLE BIT(28) | 35 | #define CLK_RST_CONTROLLER_MISC_CLK_ENB_0_ALL_VISIBLE BIT(28) |
33 | 36 | ||
37 | #if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0) | ||
34 | #define FUSE_FUSEBYPASS_0 0x24 | 38 | #define FUSE_FUSEBYPASS_0 0x24 |
35 | #define FUSE_WRITE_ACCESS_SW_0 0x30 | 39 | #define FUSE_WRITE_ACCESS_SW_0 0x30 |
36 | #define FUSE_OPT_GPU_TPC0_DISABLE_0 0x30C | 40 | #define FUSE_OPT_GPU_TPC0_DISABLE_0 0x30C |
37 | #define FUSE_OPT_GPU_TPC1_DISABLE_0 0x33C | 41 | #define FUSE_OPT_GPU_TPC1_DISABLE_0 0x33C |
42 | #endif | ||
38 | 43 | ||
39 | #define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc | 44 | #define NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE 0x02dc |
40 | #define NVB197_SET_CIRCULAR_BUFFER_SIZE 0x1280 | 45 | #define NVB197_SET_CIRCULAR_BUFFER_SIZE 0x1280 |