gpu: nvgpu: CONFIG_TEGRA_ACR is supported by default

TEGRA_ACR config is supposed to be enabled maxwell
onwards. Since gk20a support is no longer supported,
delete code that is not under TEGRA_ACR config

Change-Id: Id52485680bca1ceaadcb94f9603c0898c2002e02
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1595437
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 9 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index ef46c1ee..0d032be0 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -737,7 +737,6 @@ u32 gr_gm20b_get_tpc_num(struct gk20a *g, u32 addr)
         return 0;
 }
 
-#ifdef CONFIG_TEGRA_ACR
 static void gr_gm20b_load_gpccs_with_bootloader(struct gk20a *g)
 {
         struct gk20a_ctxsw_ucode_info *ucode_info = &g->ctxsw_ucode_info;
@@ -830,14 +829,6 @@ int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
 
         return 0;
 }
-#else
-
-int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
-{
-        return -EPERM;
-}
-
-#endif
 
 void gr_gm20b_detect_sm_arch(struct gk20a *g)
 {