gpu: nvgpu: Implement SET_RD_COALESCE

Implement SW method SET_RD_COALESCE to implement correct handling
of texture read coalescing.

Bug 200223870

Change-Id: Icd6f987b72d78e5add4076fc550e2070eba70628
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1271303
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit

1 files changed, 21 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index fc98b5ca..c74b9fec 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1,7 +1,7 @@
 /*
  * GM20B GPC MMU
  *
- * Copyright (c) 2011-2016, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2011-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -262,6 +262,20 @@ static void gr_gm20b_commit_global_pagepool(struct gk20a *g,
 
 }
 
+void gr_gm20b_set_rd_coalesce(struct gk20a *g, u32 data)
+{
+        u32 val;
+
+        gk20a_dbg_fn("");
+
+        val = gk20a_readl(g, gr_gpcs_tpcs_tex_m_dbg2_r());
+        val = set_field(val, gr_gpcs_tpcs_tex_m_dbg2_lg_rd_coalesce_en_m(),
+                             gr_gpcs_tpcs_tex_m_dbg2_lg_rd_coalesce_en_f(data));
+        gk20a_writel(g, gr_gpcs_tpcs_tex_m_dbg2_r(), val);
+
+        gk20a_dbg_fn("done");
+}
+
 static int gr_gm20b_handle_sw_method(struct gk20a *g, u32 addr,
                                           u32 class_num, u32 offset, u32 data)
 {
@@ -272,6 +286,9 @@ static int gr_gm20b_handle_sw_method(struct gk20a *g, u32 addr,
                 case NVB1C0_SET_SHADER_EXCEPTIONS:
                         gk20a_gr_set_shader_exceptions(g, data);
                         break;
+                case NVB1C0_SET_RD_COALESCE:
+                        gr_gm20b_set_rd_coalesce(g, data);
+                        break;
                 default:
                         goto fail;
                 }
@@ -288,6 +305,9 @@ static int gr_gm20b_handle_sw_method(struct gk20a *g, u32 addr,
                 case NVB197_SET_ALPHA_CIRCULAR_BUFFER_SIZE:
                         g->ops.gr.set_alpha_circular_buffer_size(g, data);
                         break;
+                case NVB197_SET_RD_COALESCE:
+                        gr_gm20b_set_rd_coalesce(g, data);
+                        break;
                 default:
                         goto fail;
                 }