diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-11-09 18:53:16 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2016-11-17 00:35:36 -0500 |
commit | d29afd2c9e990799b470bb95a97935cf5b5020db (patch) | |
tree | 48f14dffe90956e9b42b02a87b95fd7a1dfeef3e /drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |
parent | 5494e846c78dd0da74635905ead3abe45502375f (diff) |
gpu: nvgpu: Fix signed comparison bugs
Fix small problems related to signed versus unsigned comparisons
throughout the driver. Bump up the warning level to prevent such
problems from occuring in future.
Change-Id: I8ff5efb419f664e8a2aedadd6515ae4d18502ae0
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/1252068
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 56812fa6..cff0774d 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -548,11 +548,11 @@ static void gr_gm20b_load_tpc_mask(struct gk20a *g) | |||
548 | 548 | ||
549 | fuse_tpc_mask = g->ops.gr.get_gpc_tpc_mask(g, 0); | 549 | fuse_tpc_mask = g->ops.gr.get_gpc_tpc_mask(g, 0); |
550 | if (g->tpc_fs_mask_user && g->tpc_fs_mask_user != fuse_tpc_mask && | 550 | if (g->tpc_fs_mask_user && g->tpc_fs_mask_user != fuse_tpc_mask && |
551 | fuse_tpc_mask == (0x1 << g->gr.max_tpc_count) - 1) { | 551 | fuse_tpc_mask == (0x1U << g->gr.max_tpc_count) - 1U) { |
552 | u32 val = g->tpc_fs_mask_user; | 552 | u32 val = g->tpc_fs_mask_user; |
553 | val &= (0x1 << g->gr.max_tpc_count) - 1; | 553 | val &= (0x1U << g->gr.max_tpc_count) - 1U; |
554 | /* skip tpc to disable the other tpc cause channel timeout */ | 554 | /* skip tpc to disable the other tpc cause channel timeout */ |
555 | val = (0x1 << hweight32(val)) - 1; | 555 | val = (0x1U << hweight32(val)) - 1U; |
556 | gk20a_writel(g, gr_fe_tpc_fs_r(), val); | 556 | gk20a_writel(g, gr_fe_tpc_fs_r(), val); |
557 | } else { | 557 | } else { |
558 | gk20a_writel(g, gr_fe_tpc_fs_r(), pes_tpc_mask); | 558 | gk20a_writel(g, gr_fe_tpc_fs_r(), pes_tpc_mask); |