gpu: nvgpu: define fuse macro depend on kernel version

- Define fuse macros depending on kernel version as fuse
offset got changed in K4.4 and for K4.4 fuse defines are
defined in common header file (tegra-fuse.h)
- Use fuse control read/write APIs when reading control
registers for K4.4.

Bug 200243956

Change-Id: I5a86ef58d9de17a273aea8d3ce8ad5772444dac2
Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com>
Reviewed-on: http://git-master/r/1245824
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-by: Konsta Holtta <kholtta@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
GVS: Gerrit_Virtual_Submit

1 files changed, 6 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 7903af79..23144275 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -18,6 +18,7 @@
 #include <linux/io.h>
 #include <linux/tegra-fuse.h>
 #include <linux/vmalloc.h>
+#include <linux/version.h>
 
 #include <dt-bindings/soc/gm20b-fuse.h>
 
@@ -513,8 +514,13 @@ static void gr_gm20b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
         tegra_clk_writel(CLK_RST_CONTROLLER_MISC_CLK_ENB_0_ALL_VISIBLE,
                         CLK_RST_CONTROLLER_MISC_CLK_ENB_0);
 
+#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 4, 0)
         tegra_fuse_writel(0x1, FUSE_FUSEBYPASS_0);
         tegra_fuse_writel(0x0, FUSE_WRITE_ACCESS_SW_0);
+#else
+        tegra_fuse_control_write(0x1, FUSE_FUSEBYPASS_0);
+        tegra_fuse_control_write(0x0, FUSE_WRITE_ACCESS_SW_0);
+#endif
 
         if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) {
                 tegra_fuse_writel(0x0, FUSE_OPT_GPU_TPC0_DISABLE_0);