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authorTerje Bergstrom <tbergstrom@nvidia.com>2017-04-06 14:01:46 -0400
committermobile promotions <svcmobile_promotions@nvidia.com>2017-04-07 16:48:18 -0400
commitbb72b7e2ed215b26e1d9b94534c24ab4cfa52801 (patch)
tree2a8e781838616f4640d7ef3e5c04ae7d996e0ecf /drivers/gpu/nvgpu/gm20b/gr_gm20b.c
parent85f27cec5d010d4ac0f4646f11f145d4b3a122e4 (diff)
gpu: nvgpu: gm20b: Use new error macros
gk20a_err() and gk20a_warn() require a struct device pointer, which is not portable across operating systems. The new nvgpu_err() and nvgpu_warn() macros take struct gk20a pointer. Convert code to use the more portable macros. JIRA NVGPU-16 Change-Id: Ic27fb98e03a982e5a1cf672cb4e8f87ecea10a5b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1457345 Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com> Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/gr_gm20b.c14
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index ab169a60..74c35c02 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -21,6 +21,7 @@
21#include <dt-bindings/soc/gm20b-fuse.h> 21#include <dt-bindings/soc/gm20b-fuse.h>
22 22
23#include <nvgpu/kmem.h> 23#include <nvgpu/kmem.h>
24#include <nvgpu/log.h>
24 25
25#include "gk20a/gk20a.h" 26#include "gk20a/gk20a.h"
26#include "gk20a/gr_gk20a.h" 27#include "gk20a/gr_gk20a.h"
@@ -754,8 +755,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
754 (1 << LSF_FALCON_ID_GPCCS)); 755 (1 << LSF_FALCON_ID_GPCCS));
755 } 756 }
756 if (err) { 757 if (err) {
757 gk20a_err(dev_from_gk20a(g), 758 nvgpu_err(g, "Unable to recover GR falcon");
758 "Unable to recover GR falcon");
759 return err; 759 return err;
760 } 760 }
761 761
@@ -775,8 +775,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g)
775 err = g->ops.pmu.load_lsfalcon_ucode(g, falcon_id_mask); 775 err = g->ops.pmu.load_lsfalcon_ucode(g, falcon_id_mask);
776 776
777 if (err) { 777 if (err) {
778 gk20a_err(dev_from_gk20a(g), 778 nvgpu_err(g, "Unable to boot GPCCS");
779 "Unable to boot GPCCS\n");
780 return err; 779 return err;
781 } 780 }
782 } 781 }
@@ -1294,7 +1293,7 @@ static int gm20b_gr_update_sm_error_state(struct gk20a *g,
1294 1293
1295 err = gr_gk20a_disable_ctxsw(g); 1294 err = gr_gk20a_disable_ctxsw(g);
1296 if (err) { 1295 if (err) {
1297 gk20a_err(dev_from_gk20a(g), "unable to stop gr ctxsw\n"); 1296 nvgpu_err(g, "unable to stop gr ctxsw");
1298 goto fail; 1297 goto fail;
1299 } 1298 }
1300 1299
@@ -1356,7 +1355,7 @@ static int gm20b_gr_clear_sm_error_state(struct gk20a *g,
1356 1355
1357 err = gr_gk20a_disable_ctxsw(g); 1356 err = gr_gk20a_disable_ctxsw(g);
1358 if (err) { 1357 if (err) {
1359 gk20a_err(dev_from_gk20a(g), "unable to stop gr ctxsw\n"); 1358 nvgpu_err(g, "unable to stop gr ctxsw");
1360 goto fail; 1359 goto fail;
1361 } 1360 }
1362 1361
@@ -1434,8 +1433,7 @@ static int gm20b_gr_fuse_override(struct gk20a *g)
1434 gm20b_gr_tpc_disable_override(g, value); 1433 gm20b_gr_tpc_disable_override(g, value);
1435 break; 1434 break;
1436 default: 1435 default:
1437 gk20a_err(dev_from_gk20a(g), 1436 nvgpu_err(g, "ignore unknown fuse override %08x", fuse);
1438 "ignore unknown fuse override %08x", fuse);
1439 break; 1437 break;
1440 } 1438 }
1441 } 1439 }