gpu: nvgpu: support masking hww_warp_esr

Add below API pointer to support masking of hww_warp_esr
after hardware read of register and before using it
further
u32 (*mask_hww_warp_esr)(u32 hww_warp_esr)

If needed, this API will mask value of hww_warp_esr
appropriately and return it

Bug 200156699

Change-Id: I1afb1347e650fab607009c1ee55691484653a4c1
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: http://git-master/r/927133
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 309aaf95..74d687ec 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -1227,4 +1227,5 @@ void gm20b_init_gr(struct gpu_ops *gops)
         gops->gr.bpt_reg_info = gr_gm20b_bpt_reg_info;
         gops->gr.get_access_map = gr_gm20b_get_access_map;
         gops->gr.handle_fecs_error = gk20a_gr_handle_fecs_error;
+        gops->gr.mask_hww_warp_esr = gk20a_mask_hww_warp_esr;
 }