gpu: nvgpu: Move ltc HAL to common

Move implementation of ltc HAL to common/ltc.

JIRA NVGPU-956

Change-Id: Id78d74e8612d7dacfb8d322d491abecd798e42b5
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1798461
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 0 insertions, 76 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 49b81783..abc39362 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -39,7 +39,6 @@
 #include <nvgpu/hw/gm20b/hw_gr_gm20b.h>
 #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h>
 #include <nvgpu/hw/gm20b/hw_top_gm20b.h>
-#include <nvgpu/hw/gm20b/hw_ltc_gm20b.h>
 #include <nvgpu/hw/gm20b/hw_ctxsw_prog_gm20b.h>
 #include <nvgpu/hw/gm20b/hw_fuse_gm20b.h>
 #include <nvgpu/hw/gm20b/hw_perf_gm20b.h>
@@ -1438,81 +1437,6 @@ int gr_gm20b_get_preemption_mode_flags(struct gk20a *g,
         return 0;
 }
 
-bool gr_gm20b_is_ltcs_ltss_addr(struct gk20a *g, u32 addr)
-{
-        u32 ltc_shared_base = ltc_ltcs_ltss_v();
-        u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE);
-
-        return (addr >= ltc_shared_base) &&
-                (addr < (ltc_shared_base + lts_stride));
-}
-
-bool gr_gm20b_is_ltcn_ltss_addr(struct gk20a *g, u32 addr)
-{
-        u32 lts_shared_base = ltc_ltc0_ltss_v();
-        u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE);
-        u32 addr_mask = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE) - 1;
-        u32 base_offset = lts_shared_base & addr_mask;
-        u32 end_offset = base_offset + lts_stride;
-
-        return (!gr_gm20b_is_ltcs_ltss_addr(g, addr)) &&
-                ((addr & addr_mask) >= base_offset) &&
-                ((addr & addr_mask) < end_offset);
-}
-
-static void gr_gm20b_update_ltc_lts_addr(struct gk20a *g, u32 addr, u32 ltc_num,
-                                        u32 *priv_addr_table,
-                                        u32 *priv_addr_table_index)
-{
-        u32 num_ltc_slices = g->ops.gr.get_max_lts_per_ltc(g);
-        u32 index = *priv_addr_table_index;
-        u32 lts_num;
-        u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE);
-        u32 lts_stride = nvgpu_get_litter_value(g, GPU_LIT_LTS_STRIDE);
-
-        for (lts_num = 0; lts_num < num_ltc_slices; lts_num++) {
-                priv_addr_table[index++] = ltc_ltc0_lts0_v() +
-                                                ltc_num * ltc_stride +
-                                                lts_num * lts_stride +
-                                                (addr & (lts_stride - 1));
-        }
-
-        *priv_addr_table_index = index;
-}
-
-void gr_gm20b_split_lts_broadcast_addr(struct gk20a *g, u32 addr,
-                                        u32 *priv_addr_table,
-                                        u32 *priv_addr_table_index)
-{
-        u32 num_ltc = g->ltc_count;
-        u32 i, start, ltc_num = 0;
-        u32 pltcg_base = ltc_pltcg_base_v();
-        u32 ltc_stride = nvgpu_get_litter_value(g, GPU_LIT_LTC_STRIDE);
-
-        for (i = 0; i < num_ltc; i++) {
-                start = pltcg_base + i * ltc_stride;
-                if ((addr >= start) && (addr < (start + ltc_stride))) {
-                        ltc_num = i;
-                        break;
-                }
-        }
-        gr_gm20b_update_ltc_lts_addr(g, addr, ltc_num, priv_addr_table,
-                                priv_addr_table_index);
-}
-
-void gr_gm20b_split_ltc_broadcast_addr(struct gk20a *g, u32 addr,
-                                        u32 *priv_addr_table,
-                                        u32 *priv_addr_table_index)
-{
-        u32 num_ltc = g->ltc_count;
-        u32 ltc_num;
-
-        for (ltc_num = 0; ltc_num < num_ltc; ltc_num++) {
-                gr_gm20b_update_ltc_lts_addr(g, addr, ltc_num,
-                                        priv_addr_table, priv_addr_table_index);
-        }
-}
-
 void gm20b_gr_clear_sm_hww(struct gk20a *g, u32 gpc, u32 tpc, u32 sm,
                         u32 global_esr)
 {