diff options
author | David Nieto <dmartineznie@nvidia.com> | 2017-10-16 15:24:25 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-10-20 14:55:38 -0400 |
commit | 8c5ea40ccaad022401e45e61d5b6ff3354ffa413 (patch) | |
tree | b67eb0bf86473cbebeb2fb84302fdd92d262c945 /drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |
parent | e492eb5bdd8b4e6484291954f57d1b8303e22eb1 (diff) |
gpu: nvgpu: handle smid table init failures
Handle the possibility of failing gr init due to smid table initialization
failures
bug 2004378
Change-Id: I904b918a0ea31c32292edb3ab8ac3b1459c38a28
Signed-off-by: David Nieto <dmartineznie@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1581661
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 92096cfa..af834b02 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -658,9 +658,13 @@ int gr_gm20b_load_smid_config(struct gk20a *g) | |||
658 | 658 | ||
659 | int gr_gm20b_init_fs_state(struct gk20a *g) | 659 | int gr_gm20b_init_fs_state(struct gk20a *g) |
660 | { | 660 | { |
661 | int err = 0; | ||
662 | |||
661 | gk20a_dbg_fn(""); | 663 | gk20a_dbg_fn(""); |
662 | 664 | ||
663 | gr_gk20a_init_fs_state(g); | 665 | err = gr_gk20a_init_fs_state(g); |
666 | if (err) | ||
667 | return err; | ||
664 | 668 | ||
665 | g->ops.gr.load_tpc_mask(g); | 669 | g->ops.gr.load_tpc_mask(g); |
666 | 670 | ||
@@ -675,7 +679,7 @@ int gr_gm20b_init_fs_state(struct gk20a *g) | |||
675 | 679 | ||
676 | g->ops.gr.load_smid_config(g); | 680 | g->ops.gr.load_smid_config(g); |
677 | 681 | ||
678 | return 0; | 682 | return err; |
679 | } | 683 | } |
680 | 684 | ||
681 | int gr_gm20b_load_ctxsw_ucode_segments(struct gk20a *g, u64 addr_base, | 685 | int gr_gm20b_load_ctxsw_ucode_segments(struct gk20a *g, u64 addr_base, |