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author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-09-10 07:32:08 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:11:23 -0400 |
commit | 78c46b85556ca1cf0fd15d504a309f9c508064e6 (patch) | |
tree | 47b5873f2c234aec905b3c0c5d95992b5fcf5e05 /drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |
parent | 9981cf44243e644e7ba3f01b66e08bea5b24979b (diff) |
gpu: nvgpu: gm20b: Fix build warnings
Fix build warnings by removing the unused variables, functions and
duplicated code.
Enable -Werror to prevent new build warnings.
Change-Id: Ifd73344a6e12497e6dca595ac7a6edd7ca698f88
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/497374
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Reviewed-by: Deepak Nibade <dnibade@nvidia.com>
GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/gr_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/gr_gm20b.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c index 7949405c..6bf0ed27 100644 --- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c | |||
@@ -497,7 +497,7 @@ static int gr_gm20b_ctx_state_floorsweep(struct gk20a *g) | |||
497 | u32 sm_id = 0, gpc_id = 0; | 497 | u32 sm_id = 0, gpc_id = 0; |
498 | u32 sm_id_to_gpc_id[proj_scal_max_gpcs_v() * proj_scal_max_tpc_per_gpc_v()]; | 498 | u32 sm_id_to_gpc_id[proj_scal_max_gpcs_v() * proj_scal_max_tpc_per_gpc_v()]; |
499 | u32 tpc_per_gpc; | 499 | u32 tpc_per_gpc; |
500 | u32 tpc_fs_mask = 0, tpc_sm_id, gpc_tpc_id; | 500 | u32 tpc_fs_mask = 0, tpc_sm_id = 0, gpc_tpc_id = 0; |
501 | 501 | ||
502 | gk20a_dbg_fn(""); | 502 | gk20a_dbg_fn(""); |
503 | 503 | ||
@@ -689,10 +689,6 @@ static void gr_gm20b_load_gpccs_with_bootloader(struct gk20a *g) | |||
689 | 689 | ||
690 | static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) | 690 | static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) |
691 | { | 691 | { |
692 | struct gk20a_ctxsw_ucode_info *ucode_info = &g->ctxsw_ucode_info; | ||
693 | u64 addr_base = ucode_info->ucode_gpuva; | ||
694 | int i; | ||
695 | |||
696 | gk20a_dbg_fn(""); | 692 | gk20a_dbg_fn(""); |
697 | 693 | ||
698 | if (tegra_platform_is_linsim()) { | 694 | if (tegra_platform_is_linsim()) { |
@@ -702,11 +698,7 @@ static int gr_gm20b_load_ctxsw_ucode(struct gk20a *g) | |||
702 | gr_gpccs_ctxsw_mailbox_value_f(0xc0de7777)); | 698 | gr_gpccs_ctxsw_mailbox_value_f(0xc0de7777)); |
703 | } | 699 | } |
704 | 700 | ||
705 | gr_gk20a_load_falcon_bind_instblk(g); | 701 | gr_gm20b_load_gpccs_with_bootloader(g); |
706 | g->ops.gr.falcon_load_ucode(g, addr_base, | ||
707 | &g->ctxsw_ucode_info.gpccs, | ||
708 | gr_gpcs_gpccs_falcon_hwcfg_r() - | ||
709 | gr_fecs_falcon_hwcfg_r()); | ||
710 | 702 | ||
711 | gk20a_writel(g, gr_fecs_ctxsw_mailbox_clear_r(0), 0x0); | 703 | gk20a_writel(g, gr_fecs_ctxsw_mailbox_clear_r(0), 0x0); |
712 | gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(1), 0x1); | 704 | gk20a_writel(g, gr_fecs_ctxsw_mailbox_r(1), 0x1); |