gpu: nvgpu: Add multiple engine and runlist support

This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt handling support
   for gm206 GPU family
5) Added generic mechanism to identify the
   CE engine pri_base address for gm206
   (CE0, CE1 and CE2)
6) Removed hard coded engine_id logic and
   made generic way
7) Code cleanup for readability

JIRA DNVGPU-26

Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1155963
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 4 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index d5131b7a..cc709c78 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -855,6 +855,9 @@ static int gr_gm20b_dump_gr_status_regs(struct gk20a *g,
                            struct gk20a_debug_output *o)
 {
         struct gr_gk20a *gr = &g->gr;
+        u32 gr_engine_id;
+
+        gr_engine_id = gk20a_fifo_get_gr_engine_id(g);
 
         gk20a_debug_output(o, "NV_PGRAPH_STATUS: 0x%x\n",
                 gk20a_readl(g, gr_status_r()));
@@ -875,7 +878,7 @@ static int gr_gm20b_dump_gr_status_regs(struct gk20a *g,
         gk20a_debug_output(o, "NV_PGRAPH_FECS_INTR  : 0x%x\n",
                 gk20a_readl(g, gr_fecs_intr_r()));
         gk20a_debug_output(o, "NV_PFIFO_ENGINE_STATUS(GR) : 0x%x\n",
-                gk20a_readl(g, fifo_engine_status_r(ENGINE_GR_GK20A)));
+                gk20a_readl(g, fifo_engine_status_r(gr_engine_id)));
         gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY0: 0x%x\n",
                 gk20a_readl(g, gr_activity_0_r()));
         gk20a_debug_output(o, "NV_PGRAPH_ACTIVITY1: 0x%x\n",