gpu: nvgpu: Add struct gk20a ptr to FUSE APIs

Add a pointer to struct gk20a to the FUSE APIs. This helps
QNX builds avoid any static data definitions.

Also this change plumbs struct gk20a in some of the Linux clk
code and fixes a few minor style nits.

Change-Id: I27dfb2c4e9a352f784d6cead150460d8e9e808d3
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1537611
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Richard Zhao <rizhao@nvidia.com>
Reviewed-by: svccoveritychecker <svccoveritychecker@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sourab Gupta <sourabg@nvidia.com>
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 8 insertions, 8 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index f60d880d..87cf3f01 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -548,18 +548,18 @@ static u32 gr_gm20b_get_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
 
 static void gr_gm20b_set_gpc_tpc_mask(struct gk20a *g, u32 gpc_index)
 {
-        nvgpu_tegra_fuse_write_bypass(0x1);
-        nvgpu_tegra_fuse_write_access_sw(0x0);
+        nvgpu_tegra_fuse_write_bypass(g, 0x1);
+        nvgpu_tegra_fuse_write_access_sw(g, 0x0);
 
         if (g->gr.gpc_tpc_mask[gpc_index] == 0x1) {
-                nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(0x0);
-                nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(0x1);
+                nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x0);
+                nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(g, 0x1);
         } else if (g->gr.gpc_tpc_mask[gpc_index] == 0x2) {
-                nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(0x1);
-                nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(0x0);
+                nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x1);
+                nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(g, 0x0);
         } else {
-                nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(0x0);
-                nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(0x0);
+                nvgpu_tegra_fuse_write_opt_gpu_tpc0_disable(g, 0x0);
+                nvgpu_tegra_fuse_write_opt_gpu_tpc1_disable(g, 0x0);
         }
 }