gpu: nvgpu: Gpu characterstics enhancement

New members are added in nvgpu_gpu_characterstics to export more
information required specially from CUDA tools.

Change-Id: I907f3bcbd272405a13f47ef6236bc2cff01c6c80
Signed-off-by: Sujeet Baranwal <sbaranwal@nvidia.com>
Reviewed-on: http://git-master/r/679202
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 52 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
index 3d99e94d..c199964f 100644
--- a/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/gr_gm20b.c
@@ -26,6 +26,7 @@
 #include "hw_gr_gm20b.h"
 #include "hw_fifo_gm20b.h"
 #include "hw_fb_gm20b.h"
+#include "hw_top_gm20b.h"
 #include "hw_proj_gm20b.h"
 #include "hw_ctxsw_prog_gm20b.h"
 #include "hw_fuse_gm20b.h"
@@ -975,6 +976,52 @@ static int gr_gm20b_update_pc_sampling(struct channel_gk20a *c,
         return 0;
 }
 
+static u32 gr_gm20b_get_fbp_en_mask(struct gk20a *g)
+{
+        u32 fbp_en_mask, opt_fbio;
+        opt_fbio = gk20a_readl(g,  fuse_status_opt_fbio_r());
+        fbp_en_mask = fuse_status_opt_fbio_data_v(opt_fbio);
+        return fbp_en_mask;
+}
+
+static u32 gr_gm20b_get_max_ltc_per_fbp(struct gk20a *g)
+{
+        u32 ltc_per_fbp, reg;
+        reg = gk20a_readl(g,  top_ltc_per_fbp_r());
+        ltc_per_fbp = top_ltc_per_fbp_value_v(reg);
+        return ltc_per_fbp;
+}
+
+static u32 gr_gm20b_get_max_lts_per_ltc(struct gk20a *g)
+{
+        u32 lts_per_ltc, reg;
+        reg = gk20a_readl(g,  top_slices_per_ltc_r());
+        lts_per_ltc = top_slices_per_ltc_value_v(reg);
+        return lts_per_ltc;
+}
+
+u32 *gr_gm20b_rop_l2_en_mask(struct gk20a *g)
+{
+        struct nvgpu_gpu_characteristics *gpu = &g->gpu_characteristics;
+        u32 i, tmp, max_fbps_count;
+        tmp = gk20a_readl(g, top_num_fbps_r());
+        max_fbps_count = top_num_fbps_value_v(tmp);
+
+        /* mask of Rop_L2 for each FBP */
+        for (i = 0; i < max_fbps_count; i++)
+                gpu->rop_l2_en_mask[i] = fuse_status_opt_rop_l2_fbp_r(i);
+
+        return gpu->rop_l2_en_mask;
+}
+
+static u32 gr_gm20b_get_max_fbps_count(struct gk20a *g)
+{
+        u32 tmp, max_fbps_count;
+        tmp = gk20a_readl(g, top_num_fbps_r());
+        max_fbps_count = top_num_fbps_value_v(tmp);
+        return max_fbps_count;
+}
+
 void gm20b_init_gr(struct gpu_ops *gops)
 {
         gops->gr.init_gpc_mmu = gr_gm20b_init_gpc_mmu;
@@ -1020,4 +1067,9 @@ void gm20b_init_gr(struct gpu_ops *gops)
                 gr_gm20b_update_ctxsw_preemption_mode;
         gops->gr.dump_gr_regs = gr_gm20b_dump_gr_status_regs;
         gops->gr.update_pc_sampling = gr_gm20b_update_pc_sampling;
+        gops->gr.get_fbp_en_mask = gr_gm20b_get_fbp_en_mask;
+        gops->gr.get_max_ltc_per_fbp = gr_gm20b_get_max_ltc_per_fbp;
+        gops->gr.get_max_lts_per_ltc = gr_gm20b_get_max_lts_per_ltc;
+        gops->gr.get_rop_l2_en_mask = gr_gm20b_rop_l2_en_mask;
+        gops->gr.get_max_fbps_count = gr_gm20b_get_max_fbps_count;
 }