gpu: nvgpu: gm20b: Regenerate clock gating lists

Regenerate clock gating lists. Add new blocks, and takes them into
use. Also moves some clock gating settings to be applied at the
earliest possible moment right after reset.

Change-Id: I21888186c200f7a477c63bd3332e8ed578f63741
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/457698

1 files changed, 425 insertions, 26 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c b/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c
index 6b8648d3..fc4a94b9 100644
--- a/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c
+++ b/drivers/gpu/nvgpu/gm20b/gm20b_gating_reglist.c
@@ -1,6 +1,4 @@
 /*
- * drivers/video/tegra/host/gm20b/gm20b_gating_reglist.c
- *
  * Copyright (c) 2014, NVIDIA Corporation. All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify
@@ -31,6 +29,40 @@ struct gating_desc {
         u32 prod;
         u32 disable;
 };
+/* slcg bus */
+const struct gating_desc gm20b_slcg_bus[] = {
+        {.addr = 0x00001c04, .prod = 0x00000000, .disable = 0x000003fe},
+};
+
+/* slcg ce2 */
+const struct gating_desc gm20b_slcg_ce2[] = {
+        {.addr = 0x00106f28, .prod = 0x00000000, .disable = 0x000007fe},
+};
+
+/* slcg chiplet */
+const struct gating_desc gm20b_slcg_chiplet[] = {
+        {.addr = 0x0010c07c, .prod = 0x00000000, .disable = 0x00000007},
+        {.addr = 0x0010e07c, .prod = 0x00000000, .disable = 0x00000007},
+        {.addr = 0x0010d07c, .prod = 0x00000000, .disable = 0x00000007},
+        {.addr = 0x0010e17c, .prod = 0x00000000, .disable = 0x00000007},
+};
+
+/* slcg ctxsw firmware */
+const struct gating_desc gm20b_slcg_ctxsw_firmware[] = {
+        {.addr = 0x00005f00, .prod = 0x00020008, .disable = 0x0003fffe},
+};
+
+/* slcg fb */
+const struct gating_desc gm20b_slcg_fb[] = {
+        {.addr = 0x00100d14, .prod = 0x00000000, .disable = 0xfffffffe},
+        {.addr = 0x00100c9c, .prod = 0x00000000, .disable = 0x000001fe},
+};
+
+/* slcg fifo */
+const struct gating_desc gm20b_slcg_fifo[] = {
+        {.addr = 0x000026ac, .prod = 0x00000100, .disable = 0x0001fffe},
+};
+
 /* slcg gr */
 const struct gating_desc gm20b_slcg_gr[] = {
         {.addr = 0x004041f4, .prod = 0x00000000, .disable = 0x03fffffe},
@@ -74,8 +106,8 @@ const struct gating_desc gm20b_slcg_gr[] = {
         {.addr = 0x00419ce0, .prod = 0x00000000, .disable = 0x001ffffe},
         {.addr = 0x00419c74, .prod = 0x0000001e, .disable = 0x0000001e},
         {.addr = 0x00419fd4, .prod = 0x00000000, .disable = 0x0003fffe},
-        {.addr = 0x00419fdc, .prod = 0xfffffffe, .disable = 0xfffffffe},
-        {.addr = 0x00419fe4, .prod = 0x00000000, .disable = 0x00001ffe},
+        {.addr = 0x00419fdc, .prod = 0xffedff00, .disable = 0xfffffffe},
+        {.addr = 0x00419fe4, .prod = 0x00001b00, .disable = 0x00001ffe},
         {.addr = 0x00419ff4, .prod = 0x00000000, .disable = 0x00003ffe},
         {.addr = 0x00419ffc, .prod = 0x00000000, .disable = 0x0001fffe},
         {.addr = 0x0041be2c, .prod = 0x04115fc0, .disable = 0xfffffffe},
@@ -93,6 +125,12 @@ const struct gating_desc gm20b_slcg_gr[] = {
         {.addr = 0x00408a24, .prod = 0x00000000, .disable = 0x000001ff},
 };
 
+/* slcg ltc */
+const struct gating_desc gm20b_slcg_ltc[] = {
+        {.addr = 0x0017e050, .prod = 0x00000000, .disable = 0xfffffffe},
+        {.addr = 0x0017e35c, .prod = 0x00000000, .disable = 0xfffffffe},
+};
+
 /* slcg perf */
 const struct gating_desc gm20b_slcg_perf[] = {
         {.addr = 0x001be018, .prod = 0x000001ff, .disable = 0x00000000},
@@ -101,6 +139,62 @@ const struct gating_desc gm20b_slcg_perf[] = {
         {.addr = 0x001b4124, .prod = 0x00000001, .disable = 0x00000000},
 };
 
+/* slcg PriRing */
+const struct gating_desc gm20b_slcg_priring[] = {
+        {.addr = 0x001200a8, .prod = 0x00000000, .disable = 0x00000001},
+};
+
+/* slcg pwr_csb */
+const struct gating_desc gm20b_slcg_pwr_csb[] = {
+        {.addr = 0x0000017c, .prod = 0x00020008, .disable = 0x0003fffe},
+        {.addr = 0x00000e74, .prod = 0x00000000, .disable = 0x0000000f},
+        {.addr = 0x00000a74, .prod = 0x00000000, .disable = 0x00007ffe},
+        {.addr = 0x000016b8, .prod = 0x00000000, .disable = 0x0000000f},
+};
+
+/* slcg pmu */
+const struct gating_desc gm20b_slcg_pmu[] = {
+        {.addr = 0x0010a17c, .prod = 0x00020008, .disable = 0x0003fffe},
+        {.addr = 0x0010aa74, .prod = 0x00000000, .disable = 0x00007ffe},
+        {.addr = 0x0010ae74, .prod = 0x00000000, .disable = 0x0000000f},
+};
+
+/* therm gr */
+const struct gating_desc gm20b_slcg_therm[] = {
+        {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f},
+};
+
+/* slcg Xbar */
+const struct gating_desc gm20b_slcg_xbar[] = {
+        {.addr = 0x0013cbe4, .prod = 0x00000000, .disable = 0x1ffffffe},
+        {.addr = 0x0013cc04, .prod = 0x00000000, .disable = 0x1ffffffe},
+};
+
+/* blcg bus */
+const struct gating_desc gm20b_blcg_bus[] = {
+        {.addr = 0x00001c00, .prod = 0x00000042, .disable = 0x00000000},
+};
+
+/* blcg ctxsw firmware */
+const struct gating_desc gm20b_blcg_ctxsw_firmware[] = {
+        {.addr = 0x00022400, .prod = 0x00000000, .disable = 0x00000000},
+};
+
+/* blcg fb */
+const struct gating_desc gm20b_blcg_fb[] = {
+        {.addr = 0x00100d10, .prod = 0x0000c242, .disable = 0x00000000},
+        {.addr = 0x00100d30, .prod = 0x0000c242, .disable = 0x00000000},
+        {.addr = 0x00100d3c, .prod = 0x00000242, .disable = 0x00000000},
+        {.addr = 0x00100d48, .prod = 0x0000c242, .disable = 0x00000000},
+        {.addr = 0x00100d1c, .prod = 0x00000042, .disable = 0x00000000},
+        {.addr = 0x00100c98, .prod = 0x00000242, .disable = 0x00000000},
+};
+
+/* blcg fifo */
+const struct gating_desc gm20b_blcg_fifo[] = {
+        {.addr = 0x000026a4, .prod = 0x0000c242, .disable = 0x00000000},
+};
+
 /* blcg gr */
 const struct gating_desc gm20b_blcg_gr[] = {
         {.addr = 0x004041f0, .prod = 0x00004046, .disable = 0x00000000},
@@ -143,11 +237,11 @@ const struct gating_desc gm20b_blcg_gr[] = {
         {.addr = 0x00419cd4, .prod = 0x00000002, .disable = 0x00000000},
         {.addr = 0x00419cdc, .prod = 0x00000002, .disable = 0x00000000},
         {.addr = 0x00419c70, .prod = 0x00004044, .disable = 0x00000000},
-        {.addr = 0x00419fd0, .prod = 0x00000044, .disable = 0x00000000},
-        {.addr = 0x00419fd8, .prod = 0x00000045, .disable = 0x00000000},
-        {.addr = 0x00419fe0, .prod = 0x00000044, .disable = 0x00000000},
+        {.addr = 0x00419fd0, .prod = 0x00004044, .disable = 0x00000000},
+        {.addr = 0x00419fd8, .prod = 0x00004046, .disable = 0x00000000},
+        {.addr = 0x00419fe0, .prod = 0x00004044, .disable = 0x00000000},
         {.addr = 0x00419fe8, .prod = 0x00000042, .disable = 0x00000000},
-        {.addr = 0x00419ff0, .prod = 0x00000045, .disable = 0x00000000},
+        {.addr = 0x00419ff0, .prod = 0x00004045, .disable = 0x00000000},
         {.addr = 0x00419ff8, .prod = 0x00000002, .disable = 0x00000000},
         {.addr = 0x00419f90, .prod = 0x00000002, .disable = 0x00000000},
         {.addr = 0x0041be28, .prod = 0x00000042, .disable = 0x00000000},
@@ -166,16 +260,126 @@ const struct gating_desc gm20b_blcg_gr[] = {
         {.addr = 0x004089b8, .prod = 0x00004042, .disable = 0x00000000},
 };
 
+/* blcg ltc */
+const struct gating_desc gm20b_blcg_ltc[] = {
+        {.addr = 0x0017e030, .prod = 0x00000044, .disable = 0x00000000},
+        {.addr = 0x0017e040, .prod = 0x00000044, .disable = 0x00000000},
+        {.addr = 0x0017e3e0, .prod = 0x00000044, .disable = 0x00000000},
+        {.addr = 0x0017e3c8, .prod = 0x00000044, .disable = 0x00000000},
+};
+
+/* blcg pwr_csb  */
+const struct gating_desc gm20b_blcg_pwr_csb[] = {
+        {.addr = 0x00000a70, .prod = 0x00000045, .disable = 0x00000000},
+};
+
+/* blcg pmu */
+const struct gating_desc gm20b_blcg_pmu[] = {
+        {.addr = 0x0010aa70, .prod = 0x00000045, .disable = 0x00000000},
+};
+
+/* blcg Xbar */
+const struct gating_desc gm20b_blcg_xbar[] = {
+        {.addr = 0x0013cbe0, .prod = 0x00000042, .disable = 0x00000000},
+        {.addr = 0x0013cc00, .prod = 0x00000042, .disable = 0x00000000},
+};
+
 /* pg gr */
 const struct gating_desc gm20b_pg_gr[] = {
 };
 
-/* therm gr */
-const struct gating_desc gm20b_slcg_therm[] = {
-        {.addr = 0x000206b8, .prod = 0x00000000, .disable = 0x0000000f},
-};
+/* static inline functions */
+void gm20b_slcg_bus_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_bus) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_bus[i].addr,
+                                gm20b_slcg_bus[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_bus[i].addr,
+                                 gm20b_slcg_bus[i].disable);
+        }
+}
 
 /* static inline functions */
+void gm20b_slcg_ce2_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_ce2) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_ce2[i].addr,
+                                gm20b_slcg_ce2[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_ce2[i].addr,
+                                 gm20b_slcg_ce2[i].disable);
+        }
+}
+
+void gm20b_slcg_chiplet_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_chiplet) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_chiplet[i].addr,
+                                gm20b_slcg_chiplet[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_chiplet[i].addr,
+                                 gm20b_slcg_chiplet[i].disable);
+        }
+}
+
+void gm20b_slcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_ctxsw_firmware) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_ctxsw_firmware[i].addr,
+                                gm20b_slcg_ctxsw_firmware[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_ctxsw_firmware[i].addr,
+                                 gm20b_slcg_ctxsw_firmware[i].disable);
+        }
+}
+
+void gm20b_slcg_fb_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_fb) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_fb[i].addr,
+                                gm20b_slcg_fb[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_fb[i].addr,
+                                 gm20b_slcg_fb[i].disable);
+        }
+}
+
+void gm20b_slcg_fifo_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_fifo) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_fifo[i].addr,
+                                gm20b_slcg_fifo[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_fifo[i].addr,
+                                 gm20b_slcg_fifo[i].disable);
+        }
+}
+
 void gr_gm20b_slcg_gr_load_gating_prod(struct gk20a *g,
         bool prod)
 {
@@ -191,7 +395,22 @@ void gr_gm20b_slcg_gr_load_gating_prod(struct gk20a *g,
         }
 }
 
-void gr_gm20b_slcg_perf_load_gating_prod(struct gk20a *g,
+void ltc_gm20b_slcg_ltc_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_ltc) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_ltc[i].addr,
+                                gm20b_slcg_ltc[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_ltc[i].addr,
+                                gm20b_slcg_ltc[i].disable);
+        }
+}
+
+void gm20b_slcg_perf_load_gating_prod(struct gk20a *g,
         bool prod)
 {
         u32 i;
@@ -206,37 +425,52 @@ void gr_gm20b_slcg_perf_load_gating_prod(struct gk20a *g,
         }
 }
 
-void gr_gm20b_blcg_gr_load_gating_prod(struct gk20a *g,
+void gm20b_slcg_priring_load_gating_prod(struct gk20a *g,
         bool prod)
 {
         u32 i;
-        u32 size = sizeof(gm20b_blcg_gr) / sizeof(struct gating_desc);
+        u32 size = sizeof(gm20b_slcg_priring) / sizeof(struct gating_desc);
         for (i = 0; i < size; i++) {
                 if (prod)
-                        gk20a_writel(g, gm20b_blcg_gr[i].addr,
-                                gm20b_blcg_gr[i].prod);
+                        gk20a_writel(g, gm20b_slcg_priring[i].addr,
+                                gm20b_slcg_priring[i].prod);
                 else
-                        gk20a_writel(g, gm20b_blcg_gr[i].addr,
-                                gm20b_blcg_gr[i].disable);
+                        gk20a_writel(g, gm20b_slcg_priring[i].addr,
+                                gm20b_slcg_priring[i].disable);
         }
 }
 
-void gr_gm20b_pg_gr_load_gating_prod(struct gk20a *g,
+void gm20b_slcg_pwr_csb_load_gating_prod(struct gk20a *g,
         bool prod)
 {
         u32 i;
-        u32 size = sizeof(gm20b_pg_gr) / sizeof(struct gating_desc);
+        u32 size = sizeof(gm20b_slcg_pwr_csb) / sizeof(struct gating_desc);
         for (i = 0; i < size; i++) {
                 if (prod)
-                        gk20a_writel(g, gm20b_pg_gr[i].addr,
-                                gm20b_pg_gr[i].prod);
+                        gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr,
+                                gm20b_slcg_pwr_csb[i].prod);
                 else
-                        gk20a_writel(g, gm20b_pg_gr[i].addr,
-                                gm20b_pg_gr[i].disable);
+                        gk20a_writel(g, gm20b_slcg_pwr_csb[i].addr,
+                                gm20b_slcg_pwr_csb[i].disable);
         }
 }
 
-void gr_gm20b_slcg_therm_load_gating_prod(struct gk20a *g,
+void gm20b_slcg_pmu_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_pmu) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_pmu[i].addr,
+                                gm20b_slcg_pmu[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_pmu[i].addr,
+                                gm20b_slcg_pmu[i].disable);
+        }
+}
+
+void gm20b_slcg_therm_load_gating_prod(struct gk20a *g,
         bool prod)
 {
         u32 i;
@@ -251,4 +485,169 @@ void gr_gm20b_slcg_therm_load_gating_prod(struct gk20a *g,
         }
 }
 
+void gm20b_slcg_xbar_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_slcg_xbar) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_slcg_xbar[i].addr,
+                                gm20b_slcg_xbar[i].prod);
+                else
+                        gk20a_writel(g, gm20b_slcg_xbar[i].addr,
+                                gm20b_slcg_xbar[i].disable);
+        }
+}
+
+void gm20b_blcg_bus_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_bus) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_bus[i].addr,
+                                gm20b_blcg_bus[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_bus[i].addr,
+                                gm20b_blcg_bus[i].disable);
+        }
+}
+
+void gm20b_blcg_ctxsw_firmware_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_ctxsw_firmware) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_ctxsw_firmware[i].addr,
+                                gm20b_blcg_ctxsw_firmware[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_ctxsw_firmware[i].addr,
+                                gm20b_blcg_ctxsw_firmware[i].disable);
+        }
+}
+
+void gm20b_blcg_fb_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_fb) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_fb[i].addr,
+                                gm20b_blcg_fb[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_fb[i].addr,
+                                gm20b_blcg_fb[i].disable);
+        }
+}
+
+void gm20b_blcg_fifo_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_fifo) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_fifo[i].addr,
+                                gm20b_blcg_fifo[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_fifo[i].addr,
+                                gm20b_blcg_fifo[i].disable);
+        }
+}
+
+void gm20b_blcg_gr_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_gr) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_gr[i].addr,
+                                gm20b_blcg_gr[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_gr[i].addr,
+                                gm20b_blcg_gr[i].disable);
+        }
+}
+
+void gm20b_blcg_ltc_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_ltc) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_ltc[i].addr,
+                                gm20b_blcg_ltc[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_ltc[i].addr,
+                                gm20b_blcg_ltc[i].disable);
+        }
+}
+
+void gm20b_blcg_pwr_csb_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_pwr_csb) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_pwr_csb[i].addr,
+                                gm20b_blcg_pwr_csb[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_pwr_csb[i].addr,
+                                gm20b_blcg_pwr_csb[i].disable);
+        }
+}
+
+void gm20b_blcg_pmu_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_pmu) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_pmu[i].addr,
+                                gm20b_blcg_pmu[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_pmu[i].addr,
+                                gm20b_blcg_pmu[i].disable);
+        }
+}
+
+void gm20b_blcg_xbar_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_blcg_xbar) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_blcg_xbar[i].addr,
+                                gm20b_blcg_xbar[i].prod);
+                else
+                        gk20a_writel(g, gm20b_blcg_xbar[i].addr,
+                                gm20b_blcg_xbar[i].disable);
+        }
+}
+
+void gr_gm20b_pg_gr_load_gating_prod(struct gk20a *g,
+        bool prod)
+{
+        u32 i;
+        u32 size = sizeof(gm20b_pg_gr) / sizeof(struct gating_desc);
+        for (i = 0; i < size; i++) {
+                if (prod)
+                        gk20a_writel(g, gm20b_pg_gr[i].addr,
+                                gm20b_pg_gr[i].prod);
+                else
+                        gk20a_writel(g, gm20b_pg_gr[i].addr,
+                                gm20b_pg_gr[i].disable);
+        }
+}
+
 #endif /* __gm20b_gating_reglist_h__ */