gpu: nvgpu: Reorg fifo HAL initialization

Reorganize HAL initialization to remove inheritance and construct
the gpu_ops struct at compile time. This patch only covers the fifo
sub-module of the gpu_ops struct.

Perform HAL function assignments in hal_gxxxx.c through the
population of a chip-specific copy of gpu_ops.

Jira NVGPU-74

Change-Id: I43d94067a1d7eafba4cdb28311e0ce25812013a7
Signed-off-by: Sunny He <suhe@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1522553
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Alex Waterman <alexw@nvidia.com>
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>

1 files changed, 10 insertions, 2 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.h b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.h
index ca452d21..1b1b8cc1 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.h
@@ -1,7 +1,7 @@
 /*
  * GM20B Fifo
  *
- * Copyright (c) 2014, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2014-2017, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -17,5 +17,13 @@
 #define _NVHOST_GM20B_FIFO
 struct gk20a;
 
-void gm20b_init_fifo(struct gpu_ops *gops);
+void channel_gm20b_bind(struct channel_gk20a *c);
+void gm20b_fifo_trigger_mmu_fault(struct gk20a *g,
+                unsigned long engine_ids);
+u32 gm20b_fifo_get_num_fifos(struct gk20a *g);
+void gm20b_device_info_data_parse(struct gk20a *g,
+                                                u32 table_entry, u32 *inst_id,
+                                                u32 *pri_base, u32 *fault_id);
+void gm20b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f);
+
 #endif