diff options
author | Alex Waterman <alexw@nvidia.com> | 2016-12-19 18:23:01 -0500 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-01-18 19:46:38 -0500 |
commit | 8e53d790902b8a40098a5851584ae7ba58b357b6 (patch) | |
tree | 48fd2c6b26ac3137dd2dfe5255cc04f24bcc8834 /drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |
parent | 6e2237ef622113b8fa1149aa48988a99fa30594f (diff) |
gpu: nvgpu: Use timer API in gm20b code
Use the timer API instead of Linux specific APIs for handling
timeouts.
Also, lower the L2 timeout from 1 second (absurdly long) to 5ms.
Bug 1799159
Change-Id: I27dbc35b12e9bc22ff2207bb87543f76203e20f1
Signed-off-by: Alex Waterman <alexw@nvidia.com>
Reviewed-on: http://git-master/r/1273825
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/fifo_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 6be6be04..bd94a54b 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -20,6 +20,8 @@ | |||
20 | 20 | ||
21 | #include "fifo_gm20b.h" | 21 | #include "fifo_gm20b.h" |
22 | 22 | ||
23 | #include <nvgpu/timers.h> | ||
24 | |||
23 | #include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h> | 25 | #include <nvgpu/hw/gm20b/hw_ccsr_gm20b.h> |
24 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> | 26 | #include <nvgpu/hw/gm20b/hw_ram_gm20b.h> |
25 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> | 27 | #include <nvgpu/hw/gm20b/hw_fifo_gm20b.h> |
@@ -69,11 +71,10 @@ static inline u32 gm20b_engine_id_to_mmu_id(struct gk20a *g, u32 engine_id) | |||
69 | static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g, | 71 | static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g, |
70 | unsigned long engine_ids) | 72 | unsigned long engine_ids) |
71 | { | 73 | { |
72 | unsigned long end_jiffies = jiffies + | ||
73 | msecs_to_jiffies(gk20a_get_gr_idle_timeout(g)); | ||
74 | unsigned long delay = GR_IDLE_CHECK_DEFAULT; | 74 | unsigned long delay = GR_IDLE_CHECK_DEFAULT; |
75 | unsigned long engine_id; | 75 | unsigned long engine_id; |
76 | int ret = -EBUSY; | 76 | int ret = -EBUSY; |
77 | struct nvgpu_timeout timeout; | ||
77 | 78 | ||
78 | /* trigger faults for all bad engines */ | 79 | /* trigger faults for all bad engines */ |
79 | for_each_set_bit(engine_id, &engine_ids, 32) { | 80 | for_each_set_bit(engine_id, &engine_ids, 32) { |
@@ -89,6 +90,9 @@ static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g, | |||
89 | } | 90 | } |
90 | } | 91 | } |
91 | 92 | ||
93 | nvgpu_timeout_init(g, &timeout, gk20a_get_gr_idle_timeout(g), | ||
94 | NVGPU_TIMER_CPU_TIMER); | ||
95 | |||
92 | /* Wait for MMU fault to trigger */ | 96 | /* Wait for MMU fault to trigger */ |
93 | do { | 97 | do { |
94 | if (gk20a_readl(g, fifo_intr_0_r()) & | 98 | if (gk20a_readl(g, fifo_intr_0_r()) & |
@@ -99,8 +103,7 @@ static void gm20b_fifo_trigger_mmu_fault(struct gk20a *g, | |||
99 | 103 | ||
100 | usleep_range(delay, delay * 2); | 104 | usleep_range(delay, delay * 2); |
101 | delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX); | 105 | delay = min_t(u32, delay << 1, GR_IDLE_CHECK_MAX); |
102 | } while (time_before(jiffies, end_jiffies) || | 106 | } while (!nvgpu_timeout_expired(&timeout)); |
103 | !tegra_platform_is_silicon()); | ||
104 | 107 | ||
105 | if (ret) | 108 | if (ret) |
106 | gk20a_err(dev_from_gk20a(g), "mmu fault timeout"); | 109 | gk20a_err(dev_from_gk20a(g), "mmu fault timeout"); |