gpu: nvgpu: add fifo ops for intr_0_error_mask

This change is required to support t19x mmu fault

Change-Id: I3953dcf02c71ace606ba81896e56ea98683eb2ca
Signed-off-by: Seema Khowala <seemaj@nvidia.com>
Reviewed-on: http://git-master/r/1313482
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 1 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
index 27ddc968..bf0fb018 100644
--- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c
@@ -174,4 +174,5 @@ void gm20b_init_fifo(struct gpu_ops *gops)
         gops->fifo.dump_pbdma_status = gk20a_dump_pbdma_status;
         gops->fifo.dump_eng_status = gk20a_dump_eng_status;
         gops->fifo.dump_channel_status_ramfc = gk20a_dump_channel_status_ramfc;
+        gops->fifo.intr_0_error_mask = gk20a_fifo_intr_0_error_mask;
 }