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author | Deepak Nibade <dnibade@nvidia.com> | 2017-09-14 06:47:48 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2017-09-15 15:48:21 -0400 |
commit | 2b7e8a2c2a5df041c9a434804d0f3f6d9df82737 (patch) | |
tree | 126b14a854a75aa926966acfe41f4f5823711cfe /drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |
parent | 460951ed092aad787bacd0ebb0646b799d3463a1 (diff) |
gpu: nvgpu: fix channel unbind sequence from TSG
We right now remove a channel from TSG list and disable all the channels in
TSG while removing a channel from TSG
With this sequence if any one channel in TSG is closed, rest of the channels
are set as timed out and cannot be used anymore
We need to fix this sequence as below to allow removing a channel from active
TSG so that rest of the channels can still be used
- disable all channels of TSG
- preempt TSG
- check if CTX_RELOAD is set if support is available
if CTX_RELOAD is set on channel, it should be moved to some other channel
- check if FAULTED is set if support is available
- if NEXT is set on channel then it means channel is still active
print out an error in this case for the time being until properly handled
- remove the channel from runlist
- remove channel from TSG list
- re-enable rest of the channels in TSG
- clean up the channel (same as regular channels)
Add below fifo operations to support checking channel status
g->ops.fifo.tsg_verify_status_ctx_reload
g->ops.fifo.tsg_verify_status_faulted
Define ops.fifo.tsg_verify_status_ctx_reload operation for gm20b/gp10b/gp106
as gm20b_fifo_tsg_verify_status_ctx_reload()
This API will check if channel to be released has CTX_RELOAD set, if yes
CTX_RELOAD needs to be moved to some other channel in TSG
Remove static from channel_gk20a_update_runlist() and export it
Bug 200327095
Change-Id: I0dd4be7c7e0b9b759389ec12c5a148a4b919d3e2
Signed-off-by: Deepak Nibade <dnibade@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1560637
Reviewed-by: svc-mobile-coverity <svc-mobile-coverity@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/fifo_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c index 8e913f23..6b462acd 100644 --- a/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/fifo_gm20b.c | |||
@@ -183,3 +183,31 @@ void gm20b_fifo_init_pbdma_intr_descs(struct fifo_gk20a *f) | |||
183 | f->intr.pbdma.restartable_0 = | 183 | f->intr.pbdma.restartable_0 = |
184 | pbdma_intr_0_device_pending_f(); | 184 | pbdma_intr_0_device_pending_f(); |
185 | } | 185 | } |
186 | |||
187 | static void gm20b_fifo_set_ctx_reload(struct channel_gk20a *ch) | ||
188 | { | ||
189 | struct gk20a *g = ch->g; | ||
190 | u32 channel = gk20a_readl(g, ccsr_channel_r(ch->chid)); | ||
191 | |||
192 | gk20a_writel(g, ccsr_channel_r(ch->chid), | ||
193 | channel | ccsr_channel_force_ctx_reload_true_f()); | ||
194 | } | ||
195 | |||
196 | void gm20b_fifo_tsg_verify_status_ctx_reload(struct channel_gk20a *ch) | ||
197 | { | ||
198 | struct gk20a *g = ch->g; | ||
199 | struct tsg_gk20a *tsg = &g->fifo.tsg[ch->tsgid]; | ||
200 | struct channel_gk20a *temp_ch; | ||
201 | |||
202 | /* If CTX_RELOAD is set on a channel, move it to some other channel */ | ||
203 | if (gk20a_fifo_channel_status_is_ctx_reload(ch->g, ch->chid)) { | ||
204 | down_read(&tsg->ch_list_lock); | ||
205 | nvgpu_list_for_each_entry(temp_ch, &tsg->ch_list, channel_gk20a, ch_entry) { | ||
206 | if (temp_ch->chid != ch->chid) { | ||
207 | gm20b_fifo_set_ctx_reload(temp_ch); | ||
208 | break; | ||
209 | } | ||
210 | } | ||
211 | up_read(&tsg->ch_list_lock); | ||
212 | } | ||
213 | } | ||