diff options
author | Mahantesh Kumbar <mkumbar@nvidia.com> | 2018-09-10 11:41:49 -0400 |
---|---|---|
committer | mobile promotions <svcmobile_promotions@nvidia.com> | 2018-09-24 11:12:03 -0400 |
commit | 863b47064445b3dd5cdc354821c8d3d14deade33 (patch) | |
tree | 1e53f26c1549d1970d752f74ab82a4d55642620b /drivers/gpu/nvgpu/gm20b/acr_gm20b.h | |
parent | fdf77eda18b59c305d4dd8436d8b09d42ec4718a (diff) |
gpu: nvgpu: PMU init sequence change
-Moved PMU RTOS init & start RTOS from acr_gm20b.c file pmu.c
method nvgpu_init_pmu_support()
-Modified nvgpu_init_pmu_support() to init required interface
for PMU RTOS & does start PMU RTOS in secure & non-secure
based on NVGPU_SEC_PRIVSECURITY flag.
-Created secured_pmu_start ops under PMU ops to start PMU
falcon in low secure mode.
-Updated PMU ops update_lspmu_cmdline_args, setup_apertures &
secured_pmu_start assignment for gp106 & gv100 to support
modified PMU init sequence.
-Removed duplicate PMU non-secure bootstrap code from multiple
files & defined gm20b_ns_pmu_setup_hw_and_bootstrap()method
to handle non secure PMU bootstrap, reused this method
for need chips.
JIRA NVGPU-1146
Change-Id: I3957da2936b3c4ea0c985e67802c847c38de7c89
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1818099
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.h')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.h | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h index cae6ab6a..fad40081 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h | |||
@@ -41,10 +41,6 @@ int gm20b_pmu_populate_loader_cfg(struct gk20a *g, | |||
41 | void *lsfm, u32 *p_bl_gen_desc_size); | 41 | void *lsfm, u32 *p_bl_gen_desc_size); |
42 | int gm20b_flcn_populate_bl_dmem_desc(struct gk20a *g, | 42 | int gm20b_flcn_populate_bl_dmem_desc(struct gk20a *g, |
43 | void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid); | 43 | void *lsfm, u32 *p_bl_gen_desc_size, u32 falconid); |
44 | void gm20b_update_lspmu_cmdline_args(struct gk20a *g); | ||
45 | void gm20b_setup_apertures(struct gk20a *g); | ||
46 | int gm20b_pmu_setup_sw(struct gk20a *g); | ||
47 | int gm20b_init_nspmu_setup_hw1(struct gk20a *g); | ||
48 | 44 | ||
49 | int acr_ucode_patch_sig(struct gk20a *g, | 45 | int acr_ucode_patch_sig(struct gk20a *g, |
50 | unsigned int *p_img, | 46 | unsigned int *p_img, |