gpu: nvgpu: LRF, TEX, LTC, DRAM override

- Adding support for FECS mem overrides

Bug 1699676

Change-Id: I6c9ddcd98d57b29059513ee508c6f92b194c4fc7
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: http://git-master/r/921253
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 6 insertions, 1 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
index 58800c09..414e22b6 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
@@ -1,7 +1,7 @@
 /*
  * GM20B ACR
  *
- * Copyright (c) 2015, NVIDIA CORPORATION.  All rights reserved.
+ * Copyright (c) 2015-2016, NVIDIA CORPORATION.  All rights reserved.
  *
  * This program is free software; you can redistribute it and/or modify it
  * under the terms and conditions of the GNU General Public License,
@@ -124,6 +124,10 @@
 #define FLCN_NL_UCODE_HDR_OS_OVL_SIZE_IND(N) \
         (FLCN_NL_UCODE_HDR_APP_DATA_END_IND(N) + 2)
 
+enum acr_capabilities {
+        ACR_LRF_TEX_LTC_DRAM_PRIV_MASK_ENABLE_LS_OVERRIDE =     (0x00000001),
+};
+
 /*Externs*/
 
 /*Structs*/
@@ -397,6 +401,7 @@ struct acr_gm20b {
         struct flcn_bl_dmem_desc bl_dmem_desc;
         const struct firmware *pmu_fw;
         const struct firmware *pmu_desc;
+        u32 capabilities;
 };
 
 void gm20b_init_secure_pmu(struct gpu_ops *gops);