gpu: nvgpu: split init_falcon_setup_hw

This CL is as part of phased changes to support NO LSPMU
Changes done are to add new pmu ops :
- setup_apertures
- update_lspmu_cmdline_args
These would be called from pmu op init_falcon_setup_hw

JIRA NVGPU-296

Change-Id: Idbcec5c93ca3150df5c9fb81d65b9fce778cecb8
Signed-off-by: Supriya <ssharatkumar@nvidia.com>
Reviewed-on: https://git-master.nvidia.com/r/1589004
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com>
Reviewed-by: mobile promotions <svcmobile_promotions@nvidia.com>
Tested-by: mobile promotions <svcmobile_promotions@nvidia.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
index 9d261aae..e22da730 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
@@ -47,6 +47,8 @@ int gm20b_flcn_populate_bl_dmem_desc(struct gk20a *g,
 int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout_ms);
 int clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout);
 int gm20b_init_pmu_setup_hw1(struct gk20a *g, void *desc, u32 bl_sz);
+void gm20b_update_lspmu_cmdline_args(struct gk20a *g);
+void gm20b_setup_apertures(struct gk20a *g);
 
 int gm20b_pmu_setup_sw(struct gk20a *g);
 int pmu_exec_gen_bl(struct gk20a *g, void *desc, u8 b_wait_for_halt);