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authorMahantesh Kumbar <mkumbar@nvidia.com>2015-09-12 02:20:19 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2015-09-15 17:32:55 -0400
commit1b2faa54260def17037ac6f04e3f32361c5a8f92 (patch)
treecc9075ccdef77ab72ffda6571246fa9c30126649 /drivers/gpu/nvgpu/gm20b/acr_gm20b.h
parent1de62619720b86f07338402d367e278ca820c32d (diff)
gpu: nvgpu: gpccs load using priv load
- load gppcs with force priv load method. Bug n/a Change-Id: I3566375f51da701c90e0f5f873c71953f0113443 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/798144 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.h')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
index fd9cf2ec..d6315c2d 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
@@ -220,9 +220,9 @@ struct loader_config {
220 u32 overlay_dma_base; /*<! upper 32-bits of the 40-bit dma address*/ 220 u32 overlay_dma_base; /*<! upper 32-bits of the 40-bit dma address*/
221 u32 argc; 221 u32 argc;
222 u32 argv; 222 u32 argv;
223 u32 code_dma_base1; /*<! upper 7 bits of 47-bit dma address*/ 223 u16 code_dma_base1; /*<! upper 7 bits of 47-bit dma address*/
224 u32 data_dma_base1; /*<! upper 7 bits of 47-bit dma address*/ 224 u16 data_dma_base1; /*<! upper 7 bits of 47-bit dma address*/
225 u32 overlay_dma_base1; /*<! upper 7 bits of the 47-bit dma address*/ 225 u16 overlay_dma_base1; /*<! upper 7 bits of the 47-bit dma address*/
226}; 226};
227 227
228/*! 228/*!