gpu: nvgpu: move & rename acr_gm20b to acr_desc

acr_gm20b renamed to acr_desc to support
multiple gpu chips

JIRA DNVGPU-10

Change-Id: Ib3b38d5845043f026ddc365a682b7bb454463326
Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com>
Reviewed-on: http://git-master/r/1152401
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>

1 files changed, 0 insertions, 18 deletions

diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
index 179345b9..a1dceae9 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.h
@@ -386,24 +386,6 @@ struct acr_fw_header {
         u32 hdr_size; /*size of above header*/
 };
 
-struct acr_gm20b {
-        struct mem_desc ucode_blob;
-        struct bin_hdr *bl_bin_hdr;
-        struct hsflcn_bl_desc *pmu_hsbl_desc;
-        struct bin_hdr *hsbin_hdr;
-        struct acr_fw_header *fw_hdr;
-        u32 pmu_args;
-        const struct firmware *acr_fw;
-        struct flcn_acr_desc *acr_dmem_desc;
-        struct mem_desc acr_ucode;
-        const struct firmware *hsbl_fw;
-        struct mem_desc hsbl_ucode;
-        struct flcn_bl_dmem_desc bl_dmem_desc;
-        const struct firmware *pmu_fw;
-        const struct firmware *pmu_desc;
-        u32 capabilities;
-};
-
 void gm20b_init_secure_pmu(struct gpu_ops *gops);
 int prepare_ucode_blob(struct gk20a *g);
 int gm20b_pmu_setup_sw(struct gk20a *g);