summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
diff options
context:
space:
mode:
authorVijayakumar <vsubbu@nvidia.com>2015-11-24 02:06:58 -0500
committerTerje Bergstrom <tbergstrom@nvidia.com>2015-11-25 11:14:10 -0500
commitc9c278972083ac8132ddf21018058b14e2d0079f (patch)
treeb4f2b1dd3d77e2e27c1be79398104852686b50f0 /drivers/gpu/nvgpu/gm20b/acr_gm20b.c
parent10f6da09eb6fffea2d50c8fe4634e0d5f8226d7d (diff)
gpu: nvgpu: gm20b: use jiffies for wait on PMU
bug 200153970 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Change-Id: Ia5f616269bfeb834540bf4da6ecfc6e399682819 Reviewed-on: http://git-master/r/836966 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.c14
1 files changed, 10 insertions, 4 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index 5fd21af2..b6aa40e6 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -1414,13 +1414,16 @@ err_done:
1414/*! 1414/*!
1415* Wait for PMU to halt 1415* Wait for PMU to halt
1416* @param[in] g GPU object pointer 1416* @param[in] g GPU object pointer
1417* @param[in] timeout_us Timeout in Us for PMU to halt 1417* @param[in] timeout_us Timeout in msec for PMU to halt
1418* @return '0' if PMU halts 1418* @return '0' if PMU halts
1419*/ 1419*/
1420int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout) 1420int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout)
1421{ 1421{
1422 u32 data = 0; 1422 u32 data = 0;
1423 while (timeout != 0) { 1423 unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout);
1424
1425 while (time_before(jiffies, end_jiffies) ||
1426 !tegra_platform_is_silicon()) {
1424 data = gk20a_readl(g, pwr_falcon_cpuctl_r()); 1427 data = gk20a_readl(g, pwr_falcon_cpuctl_r());
1425 if (data & pwr_falcon_cpuctl_halt_intr_m()) 1428 if (data & pwr_falcon_cpuctl_halt_intr_m())
1426 /*CPU is halted break*/ 1429 /*CPU is halted break*/
@@ -1441,13 +1444,16 @@ int pmu_wait_for_halt(struct gk20a *g, unsigned int timeout)
1441/*! 1444/*!
1442* Wait for PMU halt interrupt status to be cleared 1445* Wait for PMU halt interrupt status to be cleared
1443* @param[in] g GPU object pointer 1446* @param[in] g GPU object pointer
1444* @param[in] timeout_us Timeout in Us for PMU to halt 1447* @param[in] timeout_us Timeout in msec for halt to clear
1445* @return '0' if PMU halt irq status is clear 1448* @return '0' if PMU halt irq status is clear
1446*/ 1449*/
1447int clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout) 1450int clear_halt_interrupt_status(struct gk20a *g, unsigned int timeout)
1448{ 1451{
1449 u32 data = 0; 1452 u32 data = 0;
1450 while (timeout != 0) { 1453 unsigned long end_jiffies = jiffies + msecs_to_jiffies(timeout);
1454
1455 while (time_before(jiffies, end_jiffies) ||
1456 !tegra_platform_is_silicon()) {
1451 gk20a_writel(g, pwr_falcon_irqsclr_r(), 1457 gk20a_writel(g, pwr_falcon_irqsclr_r(),
1452 gk20a_readl(g, pwr_falcon_irqsclr_r()) | (0x10)); 1458 gk20a_readl(g, pwr_falcon_irqsclr_r()) | (0x10));
1453 data = gk20a_readl(g, (pwr_falcon_irqstat_r())); 1459 data = gk20a_readl(g, (pwr_falcon_irqstat_r()));