diff options
author | Terje Bergstrom <tbergstrom@nvidia.com> | 2014-06-23 02:56:45 -0400 |
---|---|---|
committer | Dan Willemsen <dwillemsen@nvidia.com> | 2015-03-18 15:10:18 -0400 |
commit | 20408d5b32e5564b2fb410bc5b0bb0a198629437 (patch) | |
tree | 965dac6015b8ab7f9865f79a07b0876025f63309 /drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |
parent | b57c6501c75b478b08b9ea6e226c55e5039b5c86 (diff) |
gpu: nvgpu: Boot FECS to secure mode
Boot FECS to secure mode if ACR is enabled.
Bug 200006956
Change-Id: Ifc107704a6456af837b7f6c513c04d152b2f4d3a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/424251
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm20b/acr_gm20b.c | 55 |
1 files changed, 54 insertions, 1 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c index 2b7be4f7..c03629fc 100644 --- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c +++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c | |||
@@ -55,8 +55,9 @@ static int acr_ucode_patch_sig(struct gk20a *g, | |||
55 | 55 | ||
56 | /*Globals*/ | 56 | /*Globals*/ |
57 | static void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE); | 57 | static void __iomem *mc = IO_ADDRESS(TEGRA_MC_BASE); |
58 | get_ucode_details pmu_acr_supp_ucode_list[MAX_SUPPORTED_LSFM] = { | 58 | get_ucode_details pmu_acr_supp_ucode_list[] = { |
59 | pmu_ucode_details, | 59 | pmu_ucode_details, |
60 | fecs_ucode_details, | ||
60 | }; | 61 | }; |
61 | 62 | ||
62 | /*Once is LS mode, cpuctl_alias is only accessible*/ | 63 | /*Once is LS mode, cpuctl_alias is only accessible*/ |
@@ -116,6 +117,57 @@ int pmu_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | |||
116 | return 0; | 117 | return 0; |
117 | } | 118 | } |
118 | 119 | ||
120 | int fecs_ucode_details(struct gk20a *g, struct flcn_ucode_img *p_img) | ||
121 | { | ||
122 | int err = 0; | ||
123 | struct lsf_ucode_desc *lsf_desc; | ||
124 | |||
125 | lsf_desc = kzalloc(sizeof(struct lsf_ucode_desc), GFP_KERNEL); | ||
126 | if (!lsf_desc) | ||
127 | return -ENOMEM; | ||
128 | lsf_desc->falcon_id = LSF_FALCON_ID_FECS; | ||
129 | |||
130 | p_img->desc = kzalloc(sizeof(struct pmu_ucode_desc), GFP_KERNEL); | ||
131 | if (p_img->desc == NULL) { | ||
132 | kfree(lsf_desc); | ||
133 | return -ENOMEM; | ||
134 | } | ||
135 | |||
136 | p_img->desc->bootloader_start_offset = | ||
137 | g->ctxsw_ucode_info.fecs.boot.offset; | ||
138 | p_img->desc->bootloader_size = | ||
139 | g->ctxsw_ucode_info.fecs.boot.size; | ||
140 | p_img->desc->bootloader_imem_offset = | ||
141 | g->ctxsw_ucode_info.fecs.boot_imem_offset; | ||
142 | p_img->desc->bootloader_entry_point = | ||
143 | g->ctxsw_ucode_info.fecs.boot_entry; | ||
144 | |||
145 | p_img->desc->image_size = g->ctxsw_ucode_info.fecs.boot.size + | ||
146 | g->ctxsw_ucode_info.fecs.code.size + | ||
147 | g->ctxsw_ucode_info.fecs.data.size; | ||
148 | p_img->desc->app_size = 0; | ||
149 | p_img->desc->app_start_offset = 0; | ||
150 | p_img->desc->app_imem_offset = 0; | ||
151 | p_img->desc->app_imem_entry = 0; | ||
152 | p_img->desc->app_dmem_offset = 0; | ||
153 | p_img->desc->app_resident_code_offset = | ||
154 | g->ctxsw_ucode_info.fecs.code.offset; | ||
155 | p_img->desc->app_resident_code_size = | ||
156 | g->ctxsw_ucode_info.fecs.code.size; | ||
157 | p_img->desc->app_resident_data_offset = | ||
158 | g->ctxsw_ucode_info.fecs.data.offset; | ||
159 | p_img->desc->app_resident_data_size = | ||
160 | g->ctxsw_ucode_info.fecs.data.size; | ||
161 | p_img->data = g->ctxsw_ucode_info.surface_desc.cpuva; | ||
162 | p_img->data_size = p_img->desc->image_size; | ||
163 | |||
164 | p_img->fw_ver = NULL; | ||
165 | p_img->header = NULL; | ||
166 | p_img->lsf_desc = (struct lsf_ucode_desc *)lsf_desc; | ||
167 | gm20b_dbg_pmu("fecs fw loaded 2\n"); | ||
168 | return 0; | ||
169 | } | ||
170 | |||
119 | int prepare_ucode_blob(struct gk20a *g) | 171 | int prepare_ucode_blob(struct gk20a *g) |
120 | { | 172 | { |
121 | struct device *d = dev_from_gk20a(g); | 173 | struct device *d = dev_from_gk20a(g); |
@@ -132,6 +184,7 @@ int prepare_ucode_blob(struct gk20a *g) | |||
132 | memset((void *)plsfm, 0, sizeof(struct ls_flcn_mgr)); | 184 | memset((void *)plsfm, 0, sizeof(struct ls_flcn_mgr)); |
133 | gm20b_dbg_pmu("fetching GMMU regs\n"); | 185 | gm20b_dbg_pmu("fetching GMMU regs\n"); |
134 | gm20b_mm_mmu_vpr_info_fetch(g); | 186 | gm20b_mm_mmu_vpr_info_fetch(g); |
187 | gr_gk20a_init_ctxsw_ucode(g); | ||
135 | 188 | ||
136 | /* Discover all managed falcons*/ | 189 | /* Discover all managed falcons*/ |
137 | status = lsfm_discover_ucode_images(g, plsfm); | 190 | status = lsfm_discover_ucode_images(g, plsfm); |