summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
diff options
context:
space:
mode:
authorSupriya <ssharatkumar@nvidia.com>2014-08-29 21:27:04 -0400
committerDan Willemsen <dwillemsen@nvidia.com>2015-03-18 15:11:09 -0400
commit07c17aeacb25a7fad411ffa27e2e4b336c99df78 (patch)
tree09dc96bca34ec24bd116cca83caad5770643a2bc /drivers/gpu/nvgpu/gm20b/acr_gm20b.c
parent8be2f2bf4c46709f2a900b5ae5d8a61d2548ae3f (diff)
gpu: nvgpu: gm20b: Support for falctrace
Adding support for falc_trace for ACR Change-Id: Iad638b0de72ff122f43f2250dce6a37adab4cecb Signed-off-by: Supriya <ssharatkumar@nvidia.com> Reviewed-on: http://git-master/r/494162 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm20b/acr_gm20b.c')
-rw-r--r--drivers/gpu/nvgpu/gm20b/acr_gm20b.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
index 4ef25a13..ac88b650 100644
--- a/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
+++ b/drivers/gpu/nvgpu/gm20b/acr_gm20b.c
@@ -400,6 +400,11 @@ int pmu_populate_loader_cfg(struct gk20a *g,
400 g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu, 400 g->ops.pmu_ver.set_pmu_cmdline_args_cpu_freq(pmu,
401 clk_get_rate(platform->clk[1])); 401 clk_get_rate(platform->clk[1]));
402 g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1); 402 g->ops.pmu_ver.set_pmu_cmdline_args_secure_mode(pmu, 1);
403 g->ops.pmu_ver.set_pmu_cmdline_args_trace_size(
404 pmu, GK20A_PMU_TRACE_BUFSIZE);
405 g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_base(pmu);
406 g->ops.pmu_ver.set_pmu_cmdline_args_trace_dma_idx(
407 pmu, GK20A_PMU_DMAIDX_VIRT);
403 *p_bl_gen_desc_size = sizeof(p_bl_gen_desc->loader_cfg); 408 *p_bl_gen_desc_size = sizeof(p_bl_gen_desc->loader_cfg);
404 g->acr.pmu_args = addr_args; 409 g->acr.pmu_args = addr_args;
405 return 0; 410 return 0;