diff options
author | Lakshmanan M <lm@nvidia.com> | 2016-06-02 00:04:46 -0400 |
---|---|---|
committer | Terje Bergstrom <tbergstrom@nvidia.com> | 2016-06-07 15:31:34 -0400 |
commit | 6299b00beb9dabdd53c211b02658d022827b3232 (patch) | |
tree | 941d8dd8aae8f7f8c73329e182984c36a5a9bf88 /drivers/gpu/nvgpu/gm206/hal_gm206.c | |
parent | 3d7263d3cafdcfc57a6d6b9f829562845d116294 (diff) |
gpu: nvgpu: Add multiple engine and runlist support
This CL covers the following modification,
1) Added multiple engine_info support
2) Added multiple runlist_info support
3) Initial changes for ASYNC CE support
4) Added ASYNC CE interrupt handling support
for gm206 GPU family
5) Added generic mechanism to identify the
CE engine pri_base address for gm206
(CE0, CE1 and CE2)
6) Removed hard coded engine_id logic and
made generic way
7) Code cleanup for readability
JIRA DNVGPU-26
Change-Id: I2c3846c40bcc8d10c2dfb225caa4105fc9123b65
Signed-off-by: Lakshmanan M <lm@nvidia.com>
Reviewed-on: http://git-master/r/1155963
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Tested-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm206/hal_gm206.c')
-rw-r--r-- | drivers/gpu/nvgpu/gm206/hal_gm206.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/drivers/gpu/nvgpu/gm206/hal_gm206.c b/drivers/gpu/nvgpu/gm206/hal_gm206.c index 048a109f..6b5c70e2 100644 --- a/drivers/gpu/nvgpu/gm206/hal_gm206.c +++ b/drivers/gpu/nvgpu/gm206/hal_gm206.c | |||
@@ -21,7 +21,7 @@ | |||
21 | #include "gm20b/mc_gm20b.h" | 21 | #include "gm20b/mc_gm20b.h" |
22 | #include "gm20b/ltc_gm20b.h" | 22 | #include "gm20b/ltc_gm20b.h" |
23 | #include "gm20b/mm_gm20b.h" | 23 | #include "gm20b/mm_gm20b.h" |
24 | #include "gm20b/ce2_gm20b.h" | 24 | #include "ce_gm206.h" |
25 | #include "gm20b/fb_gm20b.h" | 25 | #include "gm20b/fb_gm20b.h" |
26 | #include "gm20b/pmu_gm20b.h" | 26 | #include "gm20b/pmu_gm20b.h" |
27 | #include "gm20b/gr_gm20b.h" | 27 | #include "gm20b/gr_gm20b.h" |
@@ -142,6 +142,9 @@ static int gm206_get_litter_value(struct gk20a *g, | |||
142 | case GPU_LIT_ROP_SHARED_BASE: | 142 | case GPU_LIT_ROP_SHARED_BASE: |
143 | ret = proj_rop_shared_base_v(); | 143 | ret = proj_rop_shared_base_v(); |
144 | break; | 144 | break; |
145 | case GPU_LIT_HOST_NUM_ENGINES: | ||
146 | ret = proj_host_num_engines_v(); | ||
147 | break; | ||
145 | case GPU_LIT_HOST_NUM_PBDMA: | 148 | case GPU_LIT_HOST_NUM_PBDMA: |
146 | ret = proj_host_num_pbdma_v(); | 149 | ret = proj_host_num_pbdma_v(); |
147 | break; | 150 | break; |
@@ -183,7 +186,7 @@ int gm206_init_hal(struct gk20a *g) | |||
183 | gm20b_init_fb(gops); | 186 | gm20b_init_fb(gops); |
184 | g->ops.fb.set_use_full_comp_tag_line = NULL; | 187 | g->ops.fb.set_use_full_comp_tag_line = NULL; |
185 | gm206_init_fifo(gops); | 188 | gm206_init_fifo(gops); |
186 | gm20b_init_ce2(gops); | 189 | gm206_init_ce(gops); |
187 | gm20b_init_gr_ctx(gops); | 190 | gm20b_init_gr_ctx(gops); |
188 | gm20b_init_mm(gops); | 191 | gm20b_init_mm(gops); |
189 | gm206_init_pmu_ops(gops); | 192 | gm206_init_pmu_ops(gops); |