summaryrefslogtreecommitdiffstats
path: root/drivers/gpu/nvgpu/gm206/bios_gm206.h
diff options
context:
space:
mode:
authorTerje Bergstrom <tbergstrom@nvidia.com>2017-02-09 11:17:47 -0500
committermobile promotions <svcmobile_promotions@nvidia.com>2017-02-17 16:46:32 -0500
commit53465def649b813987ca0d4a7ced744305204b82 (patch)
treecdff16681cb0442de3b1a8bd151b2a38c0bc5311 /drivers/gpu/nvgpu/gm206/bios_gm206.h
parent29a79e6b80c6a0da489d8b0a470c86e2fec9c355 (diff)
gpu: nvgpu: Generalize BIOS code
Most of BIOS parsing code is not specific to any particular GPU. Move most of the code to generic files, and leave only chip specific parts dealing with microcontroller boot into chip specific files. As most of the parsing is generic, they do not need to be called via HALs so remove the HALs and change the calls into direct function calls. All definitions meant to be used outside BIOS code itself are now in <nvgpu/bios.h> Change-Id: Id48e94c74511d6e95645e90e5bba5c12ef8da45d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/1302222 GVS: Gerrit_Virtual_Submit
Diffstat (limited to 'drivers/gpu/nvgpu/gm206/bios_gm206.h')
-rw-r--r--drivers/gpu/nvgpu/gm206/bios_gm206.h56
1 files changed, 3 insertions, 53 deletions
diff --git a/drivers/gpu/nvgpu/gm206/bios_gm206.h b/drivers/gpu/nvgpu/gm206/bios_gm206.h
index 6fe19fb0..090c7d24 100644
--- a/drivers/gpu/nvgpu/gm206/bios_gm206.h
+++ b/drivers/gpu/nvgpu/gm206/bios_gm206.h
@@ -14,60 +14,10 @@
14#ifndef NVGPU_BIOS_GM206_H 14#ifndef NVGPU_BIOS_GM206_H
15#define NVGPU_BIOS_GM206_H 15#define NVGPU_BIOS_GM206_H
16 16
17#define PERF_PTRS_WIDTH 0x4 17struct gk20a;
18#define PERF_PTRS_WIDTH_16 0x2
19
20#define NV_PCFG 0x88000
21
22enum {
23 CLOCKS_TABLE = 2,
24 CLOCK_PROGRAMMING_TABLE,
25 FLL_TABLE,
26 VIN_TABLE,
27 FREQUENCY_CONTROLLER_TABLE
28};
29
30enum {
31 PERFORMANCE_TABLE = 0,
32 MEMORY_CLOCK_TABLE,
33 MEMORY_TWEAK_TABLE,
34 POWER_CONTROL_TABLE,
35 THERMAL_CONTROL_TABLE,
36 THERMAL_DEVICE_TABLE,
37 THERMAL_COOLERS_TABLE,
38 PERFORMANCE_SETTINGS_SCRIPT,
39 CONTINUOUS_VIRTUAL_BINNING_TABLE,
40 POWER_SENSORS_TABLE = 0xA,
41 POWER_CAPPING_TABLE = 0xB,
42 POWER_TOPOLOGY_TABLE = 0xF,
43 THERMAL_CHANNEL_TABLE = 0x12,
44 VOLTAGE_RAIL_TABLE = 26,
45 VOLTAGE_DEVICE_TABLE,
46 VOLTAGE_POLICY_TABLE,
47 LOWPOWER_TABLE,
48 LOWPOWER_GR_TABLE = 32,
49 LOWPOWER_MS_TABLE = 33,
50};
51
52enum {
53 VP_FIELD_TABLE = 0,
54 VP_FIELD_REGISTER,
55 VP_TRANSLATION_TABLE,
56};
57
58struct bit_token {
59 u8 token_id;
60 u8 data_version;
61 u16 data_size;
62 u16 data_ptr;
63} __packed;
64
65struct gpu_ops; 18struct gpu_ops;
66 19
67void gm206_init_bios(struct gpu_ops *gops); 20int gm206_bios_init(struct gk20a *g);
68u8 gm206_bios_read_u8(struct gk20a *g, u32 offset); 21void gm206_init_bios_ops(struct gpu_ops *gops);
69s8 gm206_bios_read_s8(struct gk20a *g, u32 offset);
70u16 gm206_bios_read_u16(struct gk20a *g, u32 offset);
71u32 gm206_bios_read_u32(struct gk20a *g, u32 offset);
72 22
73#endif 23#endif