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authorMahantesh Kumbar <mkumbar@nvidia.com>2016-05-27 03:37:07 -0400
committerTerje Bergstrom <tbergstrom@nvidia.com>2016-06-05 18:34:50 -0400
commitb4c355d32c96137901b2943281d911e385d6f9a7 (patch)
tree6fd88be1f89fc063179d389fa2b154cc552ac9f2 /drivers/gpu/nvgpu/gm206/acr_gm206.h
parent3b566957fec720d7315549ae0d5e98eacd7c247e (diff)
gpu: nvgpu: Add gm204/gm206 ACR BL supoort
Update ACR BL desc & support for ACR boot. JIRA DNVGPU-10 Change-Id: Iced2e10695439b2e1b47835f5c3c8a5d274e4b1e Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/1155027 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Diffstat (limited to 'drivers/gpu/nvgpu/gm206/acr_gm206.h')
-rw-r--r--drivers/gpu/nvgpu/gm206/acr_gm206.h80
1 files changed, 80 insertions, 0 deletions
diff --git a/drivers/gpu/nvgpu/gm206/acr_gm206.h b/drivers/gpu/nvgpu/gm206/acr_gm206.h
new file mode 100644
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+++ b/drivers/gpu/nvgpu/gm206/acr_gm206.h
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1/*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 */
13
14#ifndef __ACR_GM206_H_
15#define __ACR_GM206_H_
16
17#include "gm20b/acr_gm20b.h"
18
19struct loader_config_v1 {
20 u32 reserved;
21 u32 dma_idx;
22 struct falc_u64 code_dma_base;
23 u32 code_size_total;
24 u32 code_size_to_load;
25 u32 code_entry_point;
26 struct falc_u64 data_dma_base;
27 u32 data_size;
28 struct falc_u64 overlay_dma_base;
29 u32 argc;
30 u32 argv;
31};
32
33struct flcn_bl_dmem_desc_v1 {
34 u32 reserved[4]; /*Should be the first element..*/
35 u32 signature[4]; /*Should be the first element..*/
36 u32 ctx_dma;
37 struct falc_u64 code_dma_base;
38 u32 non_sec_code_off;
39 u32 non_sec_code_size;
40 u32 sec_code_off;
41 u32 sec_code_size;
42 u32 code_entry_point;
43 struct falc_u64 data_dma_base;
44 u32 data_size;
45};
46
47/*!
48 * Union of all supported structures used by bootloaders.
49 */
50union flcn_bl_generic_desc_v1 {
51 struct flcn_bl_dmem_desc_v1 bl_dmem_desc_v1;
52 struct loader_config_v1 loader_cfg_v1;
53};
54
55/*!
56 * LSFM Managed Ucode Image
57 * next : Next image the list, NULL if last.
58 * wpr_header : WPR header for this ucode image
59 * lsb_header : LSB header for this ucode image
60 * bl_gen_desc : Bootloader generic desc structure for this ucode image
61 * bl_gen_desc_size : Sizeof bootloader desc structure for this ucode image
62 * full_ucode_size : Surface size required for final ucode image
63 * ucode_img : Ucode image info
64 */
65struct lsfm_managed_ucode_img_v1 {
66 struct lsfm_managed_ucode_img_v1 *next;
67 struct lsf_wpr_header wpr_header;
68 struct lsf_lsb_header lsb_header;
69 union flcn_bl_generic_desc_v1 bl_gen_desc;
70 u32 bl_gen_desc_size;
71 u32 full_ucode_size;
72 struct flcn_ucode_img ucode_img;
73};
74
75void gm206_init_secure_pmu(struct gpu_ops *gops);
76int gm206_alloc_blob_space(struct gk20a *g,
77 size_t size, struct mem_desc *mem);
78void gm206_wpr_info(struct gk20a *g, struct wpr_carveout_info *inf);
79
80#endif /*__ACR_GM206_H_*/